SAA7184

Features: · CMOS 5 V device· Digital PAL/NTSC encoder· System pixel frequency 13.5 MHz· Accepts MPEG decoded data· 8-bit wide MPEG port· Input data format Cb, Y, Cr etc. (CCIR 656)· 16-bit wide YUV input port· I2C-bus control port or alternatively MPU parallel control port· Encoder can be master o...

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SAA7184 Picture
SeekIC No. : 004484019 Detail

SAA7184: Features: · CMOS 5 V device· Digital PAL/NTSC encoder· System pixel frequency 13.5 MHz· Accepts MPEG decoded data· 8-bit wide MPEG port· Input data format Cb, Y, Cr etc. (CCIR 656)· 16-bit wide YUV ...

floor Price/Ceiling Price

Part Number:
SAA7184
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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268 Transactions

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Upload time: 2025/12/26

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Product Details

Description



Features:

· CMOS 5 V device
· Digital PAL/NTSC encoder
· System pixel frequency 13.5 MHz
· Accepts MPEG decoded data
· 8-bit wide MPEG port
· Input data format Cb, Y, Cr etc. (CCIR 656)
· 16-bit wide YUV input port
· I2C-bus control port or alternatively MPU parallel control port
· Encoder can be master or slave
· Programmable horizontal and vertical input synchronization phase
· Programmable horizontal sync output phase
· OVL overlay with Look-Up Tables (LUTs) 8 × 3 bytes
· Colour bar generator
· Line 21 closed caption encoder
· Cross-colour reduction
· Macrovision revision_6 Pay-per-View copy protection system as option (SAA7184 only). Remark: This device is protected by U.S. patent numbers 4631603 4577216 and 4819098 and other intellectual property rights. Use of the Macrovision anticopy process in the device is licensed for non-commercial home use only. Reverse engineering or disassembly is prohibited. Please contact your nearest Philips Semiconductors sales office for more information.
· DACs operating at 27 MHz with 10-bit resolution
· Controlled rise and fall times of output syncs and blanking
· Down-mode of DACs
· CVBS and S-Video output simultaneously
· PLCC68 package.




Pinout

  Connection Diagram


Description

The SAA7184 and SAA7185B digital video encoders 2 (DENC2-M6) encode digital YUV video data to an NTSC or PAL CVBS or S-Video signal.

The circuit accepts CCIR compatible YUV data with 720 active pixels per line in 4 : 2 : 2 multiplexed formats, for example MPEG decoded data. The SAA7184 and SAA7185B include a sync/clock generator and on-chip Digital-to-Analog Converters (DACs).

The SAA7184 and SAA7185B are compatible to the DIG-TV2 chip family.




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