Features: 1.1 General· 8×speed CD-ROM, 4×speed Compact Disc-Recordable (CD-R) controller· 16.9 Mbytes/s burst rate to host controller· High performance CD-ROM and CD-R interface logic· 128 pin QFP package.1.2 Interface logic (CD-ROM operation)· Full 8´ speed hardware operation· Block decoder...
SAA7390: Features: 1.1 General· 8×speed CD-ROM, 4×speed Compact Disc-Recordable (CD-R) controller· 16.9 Mbytes/s burst rate to host controller· High performance CD-ROM and CD-R interface logic· 128 pin QFP p...
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| SYMBOL | PARAMETER | MIN. | MAX. | UNIT |
| VDD | digital supply voltage | -0.5 | +7 | V |
| Vi(max) | maximum input voltage on any pin | VSS - 0.5 | VDD + 0.5 | V |
| VO | output voltage on any output | -0.5 | +7 | V |
| Tstg | storage temperature | -55 | +150 | °C |
The SAA7390 is a high integration ASIC that incorporates all of the logic necessary to connect a CD-60 based decoder to a SCSI or ATAPI host. SAA7390 also supports a data path from the host to the CDCEP (compact disc encoder) for CD-R applications. An 80C32 microcontroller and a 53CF94/92A (or an ATAPI interface device) are required to provide the full block encode/decode functions. The following functions are supported:
· Input clock doubler
· Block encoder (using a modified CDB2)
· Block decoder
· CRC checking of Mode 1 and Mode 2, Form 1 sectors
· Red book audio pass through to SCSI or ATAPI
· Sub-code and Q-channel support
· Dedicated S2B interface UART
· Dedicated SPI interface UART
· Up to 4 Mbytes DRAM buffer manager
· Third-level error correction and encoding
· Automatic storage of audio and data
· 80C32 microcontroller interface
· 53CF90 or 53CF92A/B fast SCSI or Wapiti ATAPI processor interface.
The SAA7390 uses a 33.8688 MHz clock and is capable of accepting data at eight times (n = 8 or 1.4 Mbytes/s) the normal CD-ROM data rate. The minimum host burst rate capability of the SAA7390 is 5 Mbytes/s.
Third level error correction hardware of SAA7390 is included to improve the correction efficiency of the system. The buffer manager hardware utilizes a ten-level arbitration unit and can stop the clock to the static microcontroller to emulate a wait condition when necessary. The host interface is capable of burst rates to 16.9 Mbytes/s.