Features: · Very high speed Compact Disc (CD) compatible decoding and encoding device· On-chip Analog-to-Digital Converter (ADC) and Automatic Gain Control (AGC) for HF data capture· Eight-to-Fourteen Modulation (EFM)· Advanced motor control loop to allow CAV, CLV and pseudo-CLV playback· Integrat...
SAA7392: Features: · Very high speed Compact Disc (CD) compatible decoding and encoding device· On-chip Analog-to-Digital Converter (ADC) and Automatic Gain Control (AGC) for HF data capture· Eight-to-Fourte...
SeekIC Buyer Protection PLUS - newly updated for 2013!
268 Transactions
All payment methods are secure and covered by SeekIC Buyer Protection PLUS.

| SYMBOL | PARAMETER | CONDITIONS | MIN. | MAX. | UNIT |
| VDDE VDDD VDDA Vi(max) VO |
supply voltage - pad output drivers supply voltage - core/pad ring supply voltage - analog maximum input voltage (any input) output voltage (any output) |
notes 1 and 2 notes 1 and 2 notes 1 and 2 |
-0.5 -0.5 -0.5 -0.5 -0.5 |
+4.0 +4.0 +4.0 +5.0 note 3 |
V V V V V |
| VDDD | voltage difference between VDDA and VDDD |
- | 0.25 | V | |
| IO IIK Tamb Tstg Ves1 Ves2 |
output current (continuous) DC input diode current (continuous) operating ambient temperature storage temperature electrostatic handling electrostatic handling |
note 4 note 5 |
- - 0 -55 -1000 -100 |
20 20 +70 +125 +1000 +100 |
mA mA °C °C V V |
CDR60 is a channel encoder/decoder for CD/CD-R/CD-RW/CD Audio Recorder systems. SAA7392 incorporates all logic and RAM required for the complete encoding and decoding processes.
There are two main datapaths through the CDR60 device. The decode datapath captures the incoming EFM data stream via the HF ADC and AGC functions.
The bit detector recovers the individual bits from the incoming signal, correcting asymmetry, performing noise filtering and equalisation, and recovering the channel bit clock using a digital PLL. The demodulator converts the EFM bits to byte-wide data symbols, before passing them onto the decoder for subcode extraction, de-interleaving and error correction. The decoded data of SAA7392 is then made available via the multi-function serial output interface.
The encode datapath takes data symbols from the block encoder/decoder via the serial data and subcode input functions, encoding them via the encoder block. The encoded data stream is passed to the EFM modulator, SAA7392 generates the required EFM signal, output as a digital bit stream. The encode process is controlled via the Wobble processor, encode control and EFM clock generator functions.
As well as these two data processing sections, three further blocks support overall SAA7392 operation. The system clock generator provides all digital clocks required by the CDR60. The motor servo allows the CDR60 to control the spindle motor and is controlled by the microprocessor interface. This interface of SAA7392 can be accessed either via a parallel (80C51) or a serial (I2C-bus) interface.