SAA7392

Features: · Very high speed Compact Disc (CD) compatible decoding and encoding device· On-chip Analog-to-Digital Converter (ADC) and Automatic Gain Control (AGC) for HF data capture· Eight-to-Fourteen Modulation (EFM)· Advanced motor control loop to allow CAV, CLV and pseudo-CLV playback· Integrat...

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SeekIC No. : 004484078 Detail

SAA7392: Features: · Very high speed Compact Disc (CD) compatible decoding and encoding device· On-chip Analog-to-Digital Converter (ADC) and Automatic Gain Control (AGC) for HF data capture· Eight-to-Fourte...

floor Price/Ceiling Price

Part Number:
SAA7392
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/26

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Product Details

Description



Features:

· Very high speed Compact Disc (CD) compatible decoding and encoding device
· On-chip Analog-to-Digital Converter (ADC) and Automatic Gain Control (AGC) for HF data capture
· Eight-to-Fourteen Modulation (EFM)
· Advanced motor control loop to allow CAV, CLV and pseudo-CLV playback
· Integrated FIFO for de-coupling of mechanism speed and application speed
· Versatile output interface allowing different I2S-bus and Electronic Industries Association of Japan (EIAJ) formats
· Device is fully compatible with ELM, PLUM and Sanyo CD-ROM block decoders
· Quad-pass CIRC correction for CD mode (C1-C2-C1-C2)
· Subcode/header processing for CD format
· Frequency multiplier allows use of a 8 MHz crystal.



Pinout

  Connection Diagram


Specifications

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VDDE

VDDD

VDDA

Vi(max)

VO
supply voltage - pad output drivers

supply voltage - core/pad ring

supply voltage - analog

maximum input voltage (any input)

output voltage (any output)
notes 1 and 2

notes 1 and 2

notes 1 and 2





-0.5

-0.5

-0.5

-0.5

-0.5
+4.0

+4.0

+4.0

+5.0

note 3
V

V

V

V

V
VDDD voltage difference between
VDDA and VDDD
  - 0.25 V
IO

IIK

Tamb

Tstg

Ves1

Ves2
output current (continuous)

DC input diode current (continuous)

operating ambient temperature

storage temperature

electrostatic handling

electrostatic handling








note 4

note 5
-

-

0

-55

-1000

-100
20

20

+70

+125

+1000

+100
mA

mA

°C

°C

V

V
Notes
1. All pad driver supply connections (VDDE) and analog and digital core/pad ring supply connections (VDDA and VDDD) must be made externally to the same power supply.
2. All VSS pins must be connected to the same external voltage.
3. (VDD + 0.5) or 4.1 V depending on which one is lower.
4. Equivalent to discharging a 100 pF capacitor via a 1.5 k series resistor with a rise time of 15 ns.
5. Equivalent to discharging a 200 pF capacitor via a 0.75 H series inductor.



Description

CDR60 is a channel encoder/decoder for CD/CD-R/CD-RW/CD Audio Recorder systems. SAA7392 incorporates all logic and RAM required for the complete encoding and decoding processes.

There are two main datapaths through the CDR60 device. The decode datapath captures the incoming EFM data stream via the HF ADC and AGC functions.

The bit detector recovers the individual bits from the incoming signal, correcting asymmetry, performing noise filtering and equalisation, and recovering the channel bit clock using a digital PLL. The demodulator converts the EFM bits to byte-wide data symbols, before passing them onto the decoder for subcode extraction, de-interleaving and error correction. The decoded data of SAA7392 is then made available via the multi-function serial output interface.

The encode datapath takes data symbols from the block encoder/decoder via the serial data and subcode input functions, encoding them via the encoder block. The encoded data stream is passed to the EFM modulator, SAA7392 generates the required EFM signal, output as a digital bit stream. The encode process is controlled via the Wobble processor, encode control and EFM clock generator functions.

As well as these two data processing sections, three further blocks support overall SAA7392 operation. The system clock generator provides all digital clocks required by the CDR60. The motor servo allows the CDR60 to control the spindle motor and is controlled by the microprocessor interface. This interface of SAA7392 can be accessed either via a parallel (80C51) or a serial (I2C-bus) interface.




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