SC660E

Features: · 10 output buffers for high clock fanout applications· Each output can be internally disabled for EMI and power consumption reduction.· Separate power supply for each group of 2 clock outputs for mixed voltage application.· < 250ps skew between output clocks.· 28-pin SSOP package for...

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SeekIC No. : 004485678 Detail

SC660E: Features: · 10 output buffers for high clock fanout applications· Each output can be internally disabled for EMI and power consumption reduction.· Separate power supply for each group of 2 clock out...

floor Price/Ceiling Price

Part Number:
SC660E
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/26

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Product Details

Description



Features:

· 10 output buffers for high clock fanout applications
· Each output can be internally disabled for EMI and
    power consumption reduction.
· Separate power supply for each group of 2 clock
    outputs for mixed voltage application.
· < 250ps skew between output clocks.
· 28-pin SSOP package for minimum board space
· Single output Tristate pin for testability



Pinout

  Connection Diagram


Specifications

Voltage Relative to VSS........................ -0.3V
Voltage Relative to VDD ........................ 0.3V
Storage Temperature .................. -65ºC to + 150ºC
Operating Temperature .................. -40ºC to +85ºC
Maximum Power Supply ......................... 7V

This device contains circuitry to protect the inputs against damage due to high static voltages or electric field; however, precautions should be taken to avoid
application of any voltage higher than the maximum rated voltages to this circuit. For proper operation, Vin and Vout should be constrained to the range:
VSS<(Vin or Vout)<VDD
Unused inputs must always be tied to an appropriate logic voltage level (either VSS or VDD).




Description

The SC660E is a high fanout system clock distributor. Its primary application is to create the large quantity of clocks needed to support a wide range of clock loads that are referenced to a single existing clock. Loads of up to 30 pF are supported. Primary application of this component is where long traces are used to transport clocks from their generating devices to their loads. The creation of EMI and the degradation of waveform rise and fall times is greatly reduced by running a single reference clock trace to this device and then using it to regenerate the clock that drives shorter traces by using the SC660 to generate the clocks at the target devices EMI is therefore minimized and board real estate is saved.




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