SCAN18373T

Features: IEEE 1149.1 (JTAG) Compliant Buffered active-low latch enable 3-STATE outputs for bus-oriented applications 9-bit data busses for parity applications Reduced-swing outputs source 32 mA/sink 64 mA Guaranteed to drive 50 transmission line to TTL input levels of 0.8V and 2.0V TTL compatibl...

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SCAN18373T Picture
SeekIC No. : 004485828 Detail

SCAN18373T: Features: IEEE 1149.1 (JTAG) Compliant Buffered active-low latch enable 3-STATE outputs for bus-oriented applications 9-bit data busses for parity applications Reduced-swing outputs source 32 mA/si...

floor Price/Ceiling Price

Part Number:
SCAN18373T
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/26

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Product Details

Description



Features:

  IEEE 1149.1 (JTAG) Compliant
  Buffered active-low latch enable
  3-STATE outputs for bus-oriented applications
  9-bit data busses for parity applications
  Reduced-swing outputs source 32 mA/sink 64 mA
  Guaranteed to drive 50 transmission line to TTL input levels of 0.8V and 2.0V
  TTL compatible inputs
  25 mil pitch SSOP (Shrink Small Outline Package)
  Includes CLAMP and HIGHZ instructions
  Member of Fairchild's SCAN Products



Pinout

  Connection Diagram


Specifications

Supply Voltage (VCC)                                              −0.5V to +7.0V
DC Input Diode Current (IIK)
VI = −0.5V                                                              −20 mA
VI = VCC + 0.5V                                                      +20 mA
DC Output Diode Current (IOK)
VO = −0.5V                                                             −20 mA
VO = VCC +0.5V                                                      +20 mA
DC Output Voltage (VO)                                          −0.5V to VCC + 0.5V
DC Output Source/Sink Current (IO)                       ±70 mA
DC VCC or Ground Current
Per Output Pin                                                        ±70 mA
Junction Temperature
SSOP                                                                       +140
Storage Temperature                                              −65 to +150
ESD (Min)                                                                 2000V



Description

The SCAN18373T is a high speed, low-power transparent latch featuring separate data inputs organized into dual 9-bit bytes with byte-oriented latch enable and output enable control signals. This SCAN18373T is compliant with IEEE 1149.1 Standard Test Access Port and Boundary Scan Architecture with the incorporation of the defined boundary-scan test logic and test access port consisting of Test Data Input (TDI), Test Data Out (TDO), Test Mode Select (TMS), and Test Clock (TCK).




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