Features: · 8-bit CPU optimized for control applications. · MCS-51 fully compatible instruction set· Pin-to-pin compatible with intel's 80C52/80C32. · ONCETM (ON-circuit emulation) mode· 256 Bytes of on-chip data RAM. · Power control modes· 60C52 low power CPU only. -Idle mode· 32 programmable I/O...
SD60C32P: Features: · 8-bit CPU optimized for control applications. · MCS-51 fully compatible instruction set· Pin-to-pin compatible with intel's 80C52/80C32. · ONCETM (ON-circuit emulation) mode· 256 Bytes o...
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Features: ·Wide current range·High voltage ratings up to 2400V·High surge current capabilities·Dif...

| Characteristic |
Rating |
Unit |
| Ambient temperature under bias |
0 ~+70 |
°C |
| Storage temperature |
-65 ~ +150 |
°C |
| Voltage on any pin to Vss |
-0.5~Vcc + 0.5 |
V |
| Maximum IOL per I/O pin |
15 |
㎃ |
| Power dissipation |
1 |
Watt |
The AUK 60C32/P 60C52/P is a high-performance micro controller fabricated with AUK high-density CMOS technology. The AUK CMOS technology combines the high speed and density characteristics of MOS with the low power attributes of CMOS.
The 60C52 contains a 8K×8 ROM, a 256×8 RAM, 32 I/O lines, three 16bit counter/timers, a six sourc two-priority level nested interrupt structure, a serial I/O port for either multiprocessor communication, I/O expansion or full duplex UART, and on-chip oscillator and clock circuits.
In addition, the 60C32/P 60C52/P have two software selectable modes of power reduction idle mode and power-down mode. The idle mode of 60C32/P 60C52/P freezes the CPU while allowing the RAM, timers, serial port, and interrupt system to continue functioning.
The power-down mode of 60C32/P 60C52/P saves the RAM contents but freezes the oscillator , causing all other chip function to be inoperative.