SL74HC165

Features:

·  Outputs Directly Interface to CMOS, NMOS, and TTL
·  Operating Voltage Range: 2.0 to 6.0 V
·  Low Input Current: 1.0 mA
·  High Noise Immunity Characteristic of CMOS Devices


Pinout




Specifications

Symbol	Parameter	Value	Unit
VCC	DC Supply Voltage (Referenced to GND)	-0.5 to +7.0	V
VIN	DC Input Voltage (Referenced to GND)	-1.5 to VCC +1.5	V
VOUT	DC Output Voltage (Referenced to GND)	-0.5 to VCC +0.5	V
IIN	DC Input Current, per Pin	±20	mA
IOUT	DC Output Current, per Pin	±25	mA
ICC	DC Supply Current, VCC and GND Pins	±50	mA
PD	Power Dissipation in Still Air, Plastic DIP+ SOIC Package+	750 500	mW
Tstg	Storage Temperature	-65 to +150
TL	Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package)	260

Description

The SL74HC165 is identical in pinout to the LS/ALS165. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.

This SL74HC165 is an 8-bit shift register with complementary outputs from the last stage. Data may be loaded into the register either in parallel or in serial form. When the Serial Shift/ Parallel Load input is low, the data is loaded asynchronously in parallel. When the Serial Shift/Parallel Load input is high, the data is loaded serially on the rising edge of either Clock or Clock Inhibit (see the Function Table).

The 2-input NOR clock of the SL74HC165 may be used either by combining two independent clock sources or by designating one of the clock inputs to act as a clock inhibit.