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SL74HC533

Features: · Outputs Directly Interface to CMOS, NMOS, and TTL· Operating Voltage Range: 2.0 to 6.0 V· Low Input Current: 1.0 mA· High Noise Immunity Characteristic of CMOS DevicesPinoutSpecifications Symbol Parameter Value Unit VCC DC Supply Voltage (Referenced to GND) -0.5 to +...

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SeekIC No. : 004492709 Detail

SL74HC533: Features: · Outputs Directly Interface to CMOS, NMOS, and TTL· Operating Voltage Range: 2.0 to 6.0 V· Low Input Current: 1.0 mA· High Noise Immunity Characteristic of CMOS DevicesPinoutSpecification...

SL74HC533 Data Sheet

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Part Number:
SL74HC533
Supply Ability:
5000

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  • 1~5000
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  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

·  Outputs Directly Interface to CMOS, NMOS, and TTL
·  Operating Voltage Range: 2.0 to 6.0 V
·  Low Input Current: 1.0 mA
·  High Noise Immunity Characteristic of CMOS Devices


Pinout

Connection Diagram


Specifications

Symbol Parameter
Value
Unit
VCC DC Supply Voltage (Referenced to GND)
-0.5 to +7.0
V
VIN DC Input Voltage (Referenced to GND)
-1.5 to VCC +1.5
V
VOUT DC Output Voltage (Referenced to GND)
-0.5 to VCC +0.5
V
IIN DC Input Current, per Pin
±20
mA
IOUT DC Output Current, per Pin
±35
mA
Icc DC Supply Current, VCC and GND Pins
±75
mA
PD Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
750
500
mW
Tstg Storage Temperature
-65 to +150
°C
TL Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
260
°C



Description

The SL74HC533 is identical in pinout to the LS/ALS533. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.

These latches appear transparent to data of the SL74HC533 (i.e., the outputs change asynchronously) when Latch Enable is high. The data appears as the outputs in inverted form. When Latch Enable goes low, data meeting the setup and hold time becomes latched.

The Output Enable input of the SL74HC533 does not affect the state of the latches, but when Output Enable is high, all device outputs are forced to the high-impedance state. Thus, data may be latched even when the outputs are not enabled.




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