SLE66CX322P

· 16-bit microcomputer in 0.22 µm CMOS technology
· Instruction set opcode compatible with standard SAB 8051 processor
· Enhanced 16-bit arithmetic
· Additional powerful instructions optimized for chip card applications
· Dedicated, non-standard architecture with execution time 6 times faster (18 times by PLLmax) than standard SAB 8051 processor at same external clock
· 134 Kbytes User ROM for application programs
· Additional 2 Kbytes reserved ROM for Resource Management System (RMS+ Superslim) with intelligent E² write/erase routines
· 32 Kbytes Superslim-EEPROM
· 4Kbytes XRAM, 256 bytes internal RAM, 700 bytes Crypto RAM.
· Memory Management and Protection Unit (MMU)
· Dual Key Triple DES (DDES) and EC2 GF (2n) Accelerator
· Advanced Crypto Engine for up to 2048 bit RSA computation
· Certified RSA 2048 library available (refer to product brief)
· CRC Module
· Interrupt Module
· PLL up to 15 MHz
· Two 16-bit Autoreload Timer
· Power saving sleep mode
· Ext. Clock freq. 1 to 7.5 MHz for int. Clock £ 15 MHz @ 2.7V-5.5V Ext. Clock freq. 1 to 5 MHz for int. Clock  11 MHz @ 1.62V-5.5V
· UART for handling serial interface in accordance with ISO/IEC 7816 part 3 supporting transmission protocols T=1 and T=0
· I/O routines realized in software executable
· Supply voltage range:1.62 to 5.5 V
· Current consumption
    < 10 mA @ 5.5 V
    < 6 mA @ 3.3 V
    < 4 mA @ 1.98 V
· Temperature range: -25 to +85°C
· ESD larger than 6 kV Superslim-EEPROM
· Reading and programming byte by byte
· Flexible page mode for 1 to 64 bytes write/erase operation
· 32 bytes security area (OTP)
· Fast personalization mode 0.63 ms @15MHz
· Erase + Write time < 4.0 ms @15MHz
· Minimum of 500.000 write/erase cycles at 25°C
· Data retention for a minimum of 10 years
· EEPROM programming voltage generated on chip Memory Management and Protection Unit
· Addressable memory up to 1 MByte
· Separates OS (system mode) and application (user mode)
· System routines called by traps
· OS can restrict access to peripherals in application mode
· Code execution from XRAM possible
Security Features Operation state monitoring mechanism
· Low and high voltage sensors
· Frequency sensors and filters
· Light Sensor
· Glitch Sensor
· Temperature Sensor
· Life Test Function for Sensors

SLE 66CX322P is a member of Infineon Technologies high end security controller family in advanced 0.22 µm CMOS technology. The CPU provides the high efficiency of the SAB 8051 instruction set extended by additional powerful instructions together with enhanced performance, memory sizes and security features.

The SLE 66CX322P internal clock frequency can be adjusted up to 15 MHz independent of the clock rate of the terminal with the help of the PLL. The controller IC offers 134 Kbytes of User-ROM, 256 byte internal RAM, 4096 byte XRAM and 32 Kbytes Superslim-EEPROM. The Memory Management and Protection Unit allows a secure separation of the operating system and the applications. Furthermore the MMU makes a secure downloading of applications possible after the personalization of a card. These new features suit the requirements of the next generation of multi application operating systems. For code compatibility to the SLE 66CxxS family, a transparent mode for the MMU is established which allows to keep the memory mapping of the SLE 66CxxS products.

The SLE 66CX322P CRC module allows the easy generation of checksums according to ISO/IEC 3309 (16-Bit- CRC). To minimize the overall power consumption, the chip card controller IC offers a sleep mode. The UART supports the half-duplex transmission protocols T=0 and T=1 according to ISO/IEC 7816-3. All relevant transmission parameters can be adjusted by software, as e.g. the clock division factor, direct/inverse convention and the number of stop bits. Additionally, the I/O port can be driven by communication routines realized in software. The Advanced Crypto Engine is equipped with its own RAM of 700 bytes and supports all of today known public-key algorithms based on large integer modular arithmetic.

SLE 66CX322P allows fast and efficient calculation of e.g. RSA operations with key lengths up to 2048 bit. The DDES-EC2 accelerator consists of two modules. The DES module supports symmetrical crypto algorithms according to the Data Encryption Standard in the Electronic Code Book Mode. The EC2 module accelerates the multiplication in GF(2n) and therefore the operations for elliptic curve cryptography.

The random number generator (RNG) SLE 66CX322P is able to supply the CPU with true random numbers on all conditions. As an important feature, the chip provides a new and enhanced level of on-chip security. The chip is certified according to the Common Criteria evaluation at an EAL5 level.