Features: · 27 MHz master clock (internal PLL reference clock)· Generated clocks • 27 MHz output • 33.8688 MHz output • 384fs output • 512fs output • 768fs output· Sampling frequency fs • 44.1/48 kHz· Output disable function· Low jitter output: 100 ps (typ, 15pF...
SM8703AV: Features: · 27 MHz master clock (internal PLL reference clock)· Generated clocks • 27 MHz output • 33.8688 MHz output • 384fs output • 512fs output • 768fs output· Samp...
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| Parameter |
Symbol |
Condition |
Rating |
Unit |
| Supply voltage range |
VDDA , VDD , VDD1 , VDD2 |
-0.3 to 6.5 |
V | |
| Supply voltage deviation |
VDDA VDD , VDDA VDD1 , VDDA VDD2 , VDD VDD1 , VDD VDD2 , VDD1 VDD2 |
±0.1 |
V | |
| Ground voltage deviation | VSSA VSS , VSSA VSS1 , VSSA VSS2 , VSS VSS1 , VSS VSS2 , VSS1 VSS2 |
±0.1 |
V | |
| Input voltage range |
VIN |
Digital inputs |
-0.3 to VDD+0.3 |
V |
| Output voltage range |
VOUT |
Digital outputs |
-0.3 to VDD + 0.3 |
V |
| Power dissipation |
PD |
300 |
mW | |
| Storage temperature range |
Tstg |
-55 to 125 |
|
The SM8703AV is a 27 MHz master clock, 5-system output clock generator for MPEG2 system. It has 2 builtin PLLs that, with the addition of a single crystal oscillator element, can generate 384fs, 512fs and 768fs clocks which are necessary for MPEG2 system, plus independent fixed-frequency 27 MHz and 33.8688 MHz output clocks. Each output can stop unused output by using disable function, therefore, unnecessary radiation can be suppressed. Also, visual and audio synchronous is not disrupted since each output frequency is kept in the normal ratio. Supported sampling frequencies (fs) include 44.1 or 48 kHz.