SMJ34020A

Maximum supply voltage, V_CC (see Note 1) . . . . . . . . . . . . . . . . . .  . . . . . . . . . . . . . . . . 7 V
Input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . 0.3 V to 7 V
Off-state output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .... . . . . . 2 V to 7 V
Operating termperature range, T_A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C to 125°C
Storage temperature range, T_stg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C

The SMJ34020A graphics system processor (GSP) is the second generation of an advanced high-performance CMOS 32-bit microprocessor optimized for graphics display systems. With a built-in instruction cache, the ability to simultaneously access memory and registers, and an instruction set designed to expedite raster graphics operations, the SMJ34020A provides user-programmable control of the CRT interface as well as the memory interface (both standard DRAM and multiport video RAM). The 4-gigabit (512-megabyte) physical address space is addressable on bit boundaries using variable width data fields (1 to 32 bits). Additional graphics addressing modes support 1-, 2-, 4-, 8-, 16- and 32-bit wide pixels.