SN54ABT162823

These SN54ABT162823 18-bit bus-interface flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. SN54ABT162823 are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.

The SN54ABT162823 can be used as two 9-bit flip-flops or one 18-bit flip-flop. With the clock-enable (CLKEN) input low, the D-type flip-flops enter data on the low-to-high transitions of the clock. Taking CLKEN high disables the clock buffer, thus latching the outputs. Taking the clear (CLR) input low causes the Q outputs to go low independently of the clock.

A buffered output-enable (OE) input places the nine outputs in either a normal logic state (high or low logic level) or a high-impedance state. In the high impedance state, the outputs neither load nor drive the bus linessignificantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.The outputs of SN54ABT162823, which are designed to source or sink up to 12 mA, include equivalent 25- series resistors to reduce overshoot and undershoot.