SN54ABT18652

Features: • Members of the Texas Instruments SCOPETM Family of Testability Products• Members of the Texas Instruments WidebusTM Family• Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture• Include D-Type Flip-Flops and Contro...

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SeekIC No. : 004496314 Detail

SN54ABT18652: Features: • Members of the Texas Instruments SCOPETM Family of Testability Products• Members of the Texas Instruments WidebusTM Family• Compatible With the IEEE Standard 1149.1-199...

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Part Number:
SN54ABT18652
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/24

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Product Details

Description



Features:

• Members of the Texas Instruments SCOPETM Family of Testability Products
• Members of the Texas Instruments WidebusTM Family
• Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture
• Include D-Type Flip-Flops and Control Circuitry to Provide Multiplexed Transmission of Stored and Real-Time Data
• Two Boundary-Scan Cells per I/O for Greater Flexibility
• State-of-the-Art EPIC-II BE BiCMOS Design Significantly Reduces Power Dissipation
• SCOPETM Instruction Set
IEEE Standard 1149.1-1990 Required Instructions, Optional INTEST, and P1149.1A CLAMP and HIGHZ
Parallel Signature Analysis at Inputs With Masking Option
Pseudo-Random Pattern Generation From Outputs
Sample Inputs/Toggle Outputs
Binary Count From Outputs
Device Identification
Even-Parity Opcodes
• Packaged in 64-Pin Plastic Shrink Quad Flat Pack (PM) and 68-Pin Ceramic Quad Flat Pack (HV)



Pinout

  Connection Diagram


Specifications

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 7 V
Input voltage range, VI: except I/O ports (see Note 1)  . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 7 V
                                                   I/O ports (see Note 1) . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 5.5 V
Voltage range applied to any output in the high state or power-off state, VO  . . . . . 0.5 V to 5.5 V
Current into any output in the low state, IO: SN54ABT18652  . . . . . . . . . . . . . . . . . . . . . .  . . .96 mA
                                                                       SN74ABT18652  . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . . .18 mA
Output clamp current, IOK (VO < 0)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . .50 mA
Maximum power dissipation at TA = 55°C (in still air) (see Note 2)  . . . . . . . . . . . . . . . . . . .885 mW
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65°C to 150°C



Description

The SN54ABT18652 and SN74ABT18652 scan test devices with 18-bit bus transceivers and registers are members of the Texas Instruments SCOPEE testability IC family. SN54ABT18652 and SN74ABT18652 supports IEEE Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface.

In the normal mode, SN54ABT18652 and SN74ABT18652 are 18-bit bus transceivers and registers that allow for multiplexed transmission of data directly from the input bus or from the internal registers. SN54ABT18652 and SN74ABT18652 can be used either as two 9-bit transceivers or one 18-bit transceiver. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device pins or to perform a self test on the boundary test cells. Activating the TAP in the normal mode does not affect the functional operation of the SCOPEE bus transceivers and
registers.

Data flow in each direction SN54ABT18652 and SN74ABT18652 is controlled by clock (CLKAB and CLKBA), select (SAB and SBA), and output-enable (OEAB and OEBA) inputs. For A-to-B data flow, data on the A bus is clocked into the associated registers onthe low-to-high transition of CLKAB. When SAB is low, real-time A data is selected for presentation to the B bus (transparent mode). When SAB is high, stored A data is selected for presentation to the B bus (registered mode). When OEAB is high, the B outputs are active. When OEAB is low, the B outputs are in the high-impedance state. Control for B-to-A data flow is similar to that for A-to-B data flow but uses CLKBA, SBA, and OEBA inputs. Since the OEBA input is active-low, the A outputs are active when OEBA is low and are in the high-impedance state when OEBA is high. Figure 1 illustrates the four fundamental bus-management functions, SN54ABT18652 and SN74ABT18652 can be performed with the 4ABT18652.




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