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SN54ABT32501

Features: • Members of the Texas Instruments Widebus+TM Family• State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation• UBTTM (Universal Bus Transceiver) Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or Clocked Mo...

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SeekIC No. : 004496331 Detail

SN54ABT32501: Features: • Members of the Texas Instruments Widebus+TM Family• State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation• UBTTM (Universal Bus Transceiver...

SN54ABT32501 Data Sheet

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Part Number:
SN54ABT32501
Supply Ability:
5000

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  • 1~5000
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  • 15 Days
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Product Details

Description



Features:

• Members of the Texas Instruments Widebus+TM Family
• State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation
• UBTTM (Universal Bus Transceiver) Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or Clocked Mode
• ESD Protection Exceeds 2000 V per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
• Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 5 V, TA = 25°C
• Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
• High-Drive Outputs (32-mA IOH, 64-mA IOL)
• Bus-Hold Inputs Eliminate the Need for External Pullup Resistors
• Packaged in 100-Pin Plastic Thin Quad Flat (PZ) Package With 14 * 14-mm Body Using 0.5-mm Lead Pitch 


Pinout

Connection Diagram


Specifications

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
Input voltage range, VI (except I/O ports) (see Note 1)  . . . . . . . . . . . .  . . . . . . . . . . . . . .0.5 V to 7 V
Voltage range applied to any output in the high state or power-off state, VO  . . . . . . . .0.5 V to 5.5 V
Current into any output in the low state, IO: SN54ABT32501  . . . . . . . . . . . . . . . . . . . . . . . . . . . .96 mA
                                                                       SN74ABT32501 . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, IIK (VI < 0)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . . . . . . . . .18 mA
Output clamp current, IOK (VO < 0)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . . . . . . . .50 mA
Maximum power dissipation at TA = 55°C (in still air) (see Note 2)  . . . . . .  . .. . . . . . . . . . . . . . . . .1.2 W
Operating free-air temperature range, TA:SN54ABT32501  . . . . . . . . . . . . . . . . . . . .  . . .55°C to 125°C
                                                                  SN74ABT32501  . . . . . . . . . . . . . . . . .  . . . . . . .40°C to 85°C
Storage temperature range  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65°C to 150°C


Description

These 36-bit UBTs combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes.

Data flow in each direction of SN54ABT32501 is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A-bus data is stored in the latch/flip-flop on the low-to-high transition of CLKAB. Data flow for B to A is similar to that of A to B, but uses OEBA, LEBA, and CLKBA.

Output-enable OEAB SN54ABT32501 is active high. When OEAB is high, the outputs are active. When OEAB is low, the outputs are in the high-impedance state. The output of SN54ABT32501 enables are complementary (OEAB is active high, and OEBA is active low).

To ensure the high-impedance state during power up or power down, OEBA should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver (B to A). OEAB SN54ABT32501 should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver (A to B).

Active bus-hold circuitry of SN54ABT32501 is provided to hold unused or floating data inputs at a valid logic level.

The SN54ABT32501 is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74ABT32501 is characterized for operation from 40°C to 85°C.




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