SN54ALVTH16646

The SN54ALVTH16646 is 16-bit bus transceivers designed for 2.5-V or 3.3-V V_CC operation, but with the capability to provide a TTL interface to a 5-V system environment.

SN54ALVTH16646 can be used as two 8-bit transceivers or one 16-bit transceiver. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions, SN54ALVTH16646 can be performed with the 4ALVTH16646.

Output-enable (OE) and direction-control (DIR) inputs of SN54ALVTH16646 are provided to control the transceiver functions. In the transceiver mode, data present at the high-impedance port may be stored in either register or in both. The select-control (SAB and SBA) inputs SN54ALVTH16646 can multiplex stored and real-time (transparent mode) data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. DIR determines which bus receives data whenOE is low. In the isolation mode (OE high), A data of SN54ALVTH16646 can be stored in one register and/or B data can be stored in the other register.

When an output function is disabled, the input function of SN54ALVTH16646 is still enabled and can be used to store and transmit data. Only one of the two buses, A or B, can be driven at a time.