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SN54HC573A

PinoutSpecificationsSupply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .... . . −0.5 V to 7 VInput clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . .±20 mAOutput clamp current, IOK (VO < 0 or VO > VCC) (see Note...

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SeekIC No. : 004496897 Detail

SN54HC573A: PinoutSpecificationsSupply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .... . . −0.5 V to 7 VInput clamp current, IIK (VI < 0 or VI > VCC) (see Not...

SN54HC573A Data Sheet

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Part Number:
SN54HC573A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Pinout

Connection Diagram


Specifications

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . −0.5 V to 7 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . .±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . .±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . .±35 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . .±70 mA
Package thermal impedance, JA (see Note 2): DB package . . . . . . . . . . . .70°C/W
                                                                          DW package . . . . . . . . . . . .58°C/W
                                                                          N package . . . . . . . . . . . . . 69°C/W
                                                                          PW package . . . . . . . . . . . .83°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C


Description

These octal transparent D-type latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. While the latch-enable (LE) input is high, the Q outputs respond to the data (D) inputs. When LE is low, the outputs are latched to retain the data that was set up.

A buffered output-enable (OE) input of SN54HC574 can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs of SN54HC574 neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.




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