SN54L323

The SN54LS323 is a low-Power Schottky.These Low-Power Schottky eight bit universal registers feature multiplexed inputs/outputs to achieve full eight bit data handling in a single 20 pin package.Two function select inputs and two output control inputs can be used to choose the modes of operation listed in the function table.Synchronous parallel loading is accomplished by taking both function-select lines.SO and S1,high .This places the three state outputs in a high impedance state,which permits date that is applied on the input/output lines to be clocked into the register.Reading out of the register SN54LS323 can be accomplished while the outputs of SN54LS323 are enabled in any mode.The clear function is synchronous,and a low level at the clear input clears the register on the next low to high transition of the clock.

Features of the SN54LS323 are:(1)Multiplexed Inputs/Outputs provide Improved Bit Density;(2)Four Modes of Operationl:Hold(Stare) Shift Left,Shift Right,Load Data;(3)Opetates with Outputs Enabled or at High Z ;(4)3-State Outputs Drive Bus Lines Directly;(5)Can Be Cascaded for N bit Word Lengths;(6)Typical Pover Dissipation:175mW;(7)Exceptionally Stable Shift(Clock) Frequency:25MHz;(8)Applications:Stacked or Push Down Registers,Buffer Storage,and Accumulator Registers;(9)SN54LS299 and SN74LS299 Are Similar But Have Direct Overriding Clear.