Features: *EPICE (Enhanced-Performance Implanted CMOS) Process* Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25* Typical VOHV (Output VOH Undershoot) > 2 V at VCC, TA = 25* Latch-Up Performance Exceeds 250 mA Per JESD 17* ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015...
SN54LV245A: Features: *EPICE (Enhanced-Performance Implanted CMOS) Process* Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25* Typical VOHV (Output VOH Undershoot) > 2 V at VCC, TA = 25* Latch-U...
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Features: PinoutSpecificationsDescriptionThe SN54/74LS147 and SN54/74LS148 are Priority Encoders. ...
PinoutDescriptionThe LS155 and LS156 are Dual 1-of-4 Decoder/Demultiplexers with common Address in...

These octal bus transceivers are designed for 2-V to 5.5-V VCC operation.
The SN54LV245A devices are designed for asynchronous communication between data buses. The SN54LV245A transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are effectively isolated.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor SN54LV245A is determined by the current-sinking capability of the driver.
The SN54LV245A is characterized for operation over the full military temperature range of 55 to 125. The SN74LV245A is characterized for operation from 40 to 85.