SN54LV74FK

The SN54LV74FK is designed for 2.7-V to 5.5-V VCC operation. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) inputs meeting the setup-time requirements of SN54LV74FK is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.

The absolute maximum ratings of the SN54LV74FK are: (1)Supply voltage range, VCC: 0.5 V to 7 V; (2)Input voltage range, VI: 0.5 V to VCC + 0.5 V; (3)Output voltage range, VO: 0.5 V to VCC + 0.5 V; (4)Input clamp current, IIK (VI < 0 or VI > VCC): ±20 mA; (5)Output clamp current, IOK (VO < 0 or VO > VCC): ±50 mA; (6)Continuous output current, IO (VO = 0 to VCC): ±25 mA; (7)Continuous current through VCC or GND: ±50 mA; (8)Maximum power dissipation at TA = 55°C (in still air): D package 1.25 W,  DB or PW package  0.5 W; (9)Storage temperature range, Tstg: 65°C to 150°C.