PinoutSpecificationsSupply voltage, VCC1 (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . 15 VSupply voltage, VCC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 VInput voltage, VI . . . ...
SN65512C: PinoutSpecificationsSupply voltage, VCC1 (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . 15 VSupply voltage, VCC2 . . . . . . . . . . . . . . . . . ...
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Supply voltage, VCC1 (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . 15 V
Supply voltage, VCC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . VCC1
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range: SN65512C . . . . . . . . . . . . . . . . . . . .. . . . 40 to 85
SN75512C . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 70
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 to 150
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . .. . 260
1. Voltage values are with respect to network GND.
The SN65512C and SN75512C are monolithic BIDFET† integrated circuits designed to drive a dot matrix or segmented vacuum fluorescent display.
SN65512C and SN75512C inputs are diode-clamped pnp inputs and assume a high logic level when open circuited. The nominal input threshold is 1.5 V. Outputs of SN65512C and SN75512C are totem-pole structures formed by an npn emitter follower and double-diffused MOS (DMOS) transistors.
The SN65512C and SN75512C consists of a 12-bit shift register, 12 latches, and 12 output AND gates. Serial data is entered into the shift register on the low-to-high rtransition of CLOCK. When high, LATCH ENABLE transfers the shift register contents to the outputs of the 12 latches. The active-low STROBE input enables all Q outputs. Serial data output from the shift register SN65512C and SN75512C can be used to cascade shift registers. This output is not affected by LATCH ENABLE or STROBE.
The SN65512C is characterized for operation from 40 to 85 . The SN75512C is characterized for operation from 0 to 70 .