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MFG:TI  Package Cooled:SMD2X3  D/C:08+  

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Part Number: SN74AHC1G04DCKR

 

MFG: TI

Package Cooled: SMD2X3

D/C: 08+

Description: The SN74AHC1G04 contains one inverter gate. The device performs the Boolean function Y =

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SN74AHC1G04DCKR General Description


The SN74AHC1G04 contains one inverter gate. The device performs the Boolean function Y = A.

SN74AHC1G04DCKR Maximum Ratings

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (see Note 1)  . . . . . . . . . . . . . . . . . . . . . .−0.5 V to 7 V
Output voltage range, VO (see Note 1)  . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .−20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . .±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . .±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . .±50 mA
Package thermal impedance, JA (see Note 2): DBV package   . . . . . .206°C/W
                                                                          DCK package   . . . . . .252°C/W
                                                                          DRL package   . . . . . .142°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . .−65°C to 150°C
† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
             2. The package thermal impedance is calculated in accordance with JESD 51-7.

SN74AHC1G04DCKR Features

Operating Range of 2 V to 5.5 V
Max tpd of 8 ns at 5 V
Low Power Consumption, 10-µA Max ICC
±8-mA Output Drive at 5 V
Schmitt Trigger Action at All Inputs Makes the Circuit Tolerant for Slower Input Rise and Fall Time
Latch-Up Performance Exceeds 250 mA Per JESD 17
ESD Protection Exceeds JESD 22
   −  2000-V Human-Body Model (A114-A)
   −  200-V Machine Model (A115-A)
   −  1000-V Charged-Device Model (C101) 

SN74AHC1G04DCKR Connection Diagram

SN74AHC1G04DCKR Connection Diagram

SN74AHC1G04DCKR datasheet

SN74AHC1G04DCKR
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