SN74ALS2238

This SN74ALS2238 576-bit memory uses advanced low-power Schottky IMPACT-XE technology and features high speed and fast fall-through times. It consists of two FIFOs organized as 32 words by 9 bits each.

A FIFO memory of SN74ALS2238 is a storage device that allows data to be written into and read from its array at independent data rates. These FIFOs are designed to process data at rates from 0 to 40 MHz in a bit-parallel format, word by word.

The SN74ALS2238 consists of bus-transceiver circuits, two 32 × 9 FIFOs, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal FIFO memories. Enables GAB and GBA are provided to control the transceiver functions. The SAB and SBA control pins are provided to select whether real-time or stored data is transferred. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexerduring the transition between stored and real-time data. A low level selects real-time data and a high selects stored data. Eight fundamental bus-management functions can be performed as shown in Figure 1.

Data of SN74ALS2238 on the A or B data bus, or both, is written into the FIFOs on a low-to-high transition at the load clock (LDCKA or LDCKB) input and is read out on a low-to-high transition at the unload clock (UNCKA or UNCKB) input. The memory is full when the number of words clocked in exceeds, by the defined depth, the number of words clocked out.When the memory is full, LDCK signals have no effect on the data residing in memory. When the memory is empty, UNCK signals have no effect.