SN74ALS561A

Features: • Carry Output for n-Bit Cascading• Buffer-Type Outputs Drive Bus Lines Directly• Choice of Asynchronous or Synchronous Clearing and Loading• Internal Look-Ahead Circuitry for Fast Cascading• Package Options Include Plastic Small-Outline (DW) Packages, Ceram...

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SeekIC No. : 004498156 Detail

SN74ALS561A: Features: • Carry Output for n-Bit Cascading• Buffer-Type Outputs Drive Bus Lines Directly• Choice of Asynchronous or Synchronous Clearing and Loading• Internal Look-Ahead Ci...

floor Price/Ceiling Price

Part Number:
SN74ALS561A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/24

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Product Details

Description



Features:

• Carry Output for n-Bit Cascading
• Buffer-Type Outputs Drive Bus Lines Directly
• Choice of Asynchronous or Synchronous Clearing and Loading
• Internal Look-Ahead Circuitry for Fast Cascading
• Package Options Include Plastic    Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs



Pinout

  Connection Diagram  Connection Diagram


Specifications

Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . 7 V
Operating free-air temperature range, TA: SN54ALS561A . . . . . . . . . .... . . 55°C to 125°C
SN74ALS561A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ........................................ . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . 65°C to 150°C
 


Description

These SN54ALS561A and SN74ALS561A binary counters are programmable and offer synchronous and asynchronous clearing as well as synchronous and asynchronous loading. All synchronous functions are executed on the positive-going edge of the clock.The clear function is initiated by applying a low level to either asynchronous clear (ACLR) or synchronous clear (SCLR). ACLR (direct clear) overrides all other functions of the SN54ALS561A and SN74ALS561A  device, while SCLR overrides only the other synchronous functions. Data is loaded from the A, B, C, and D inputs by applying a low level to asynchronous load (ALOAD) or by the combination of a low level at synchronous load (SLOAD) and a positive-going clock transition. The counting function of SN54ALS561A and SN74ALS561A  is enabled only when enable P (ENP), enable T (ENT), ACLR, ALOAD, SCLR, and SLOAD are all high.

A high level of SN54ALS561A and SN74ALS561A  at the output-enable (OE) input forces the Q outputs into the high-impedance state, and a low level enables those outputs. Counting is independent of OE. ENT is fed forward to enable the ripple-carry output (RCO) to produce a high-level pulse while the count is maximum (15). The clocked carry output (CCO) produces a high-level pulse for a duration equal to that of the low level of the clock when RCO is high and the counter is enabled (ENP and ENT are high); otherwise, CCO is low. CCO does not have the glitches commonly associated
with a ripple-carry output. Cascading is normally accomplished by connecting RCO or CCO of the first counter to ENT of the next counter. However, for very high-speed counting, RCO should be used for cascading because CCO does not become active until the clock returns to the low level.

In the SN54ALS561A and SN74ALS561A  series, the SN54ALS561A is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74ALS561A is characterized for operation from 0°C to 70°C.




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