SN74ALVC16260

Features: EPICTM (Enhanced-Performance Implanted CMOS) Submicron ProcessMember of the Texas Instruments WidebusTM FamilyESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)Latch-Up Performance Exceeds 250 mA Per JEDEC Standard JESD-17Fl...

product image

SN74ALVC16260 Picture
SeekIC No. : 004498221 Detail

SN74ALVC16260: Features: EPICTM (Enhanced-Performance Implanted CMOS) Submicron ProcessMember of the Texas Instruments WidebusTM FamilyESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Usi...

floor Price/Ceiling Price

Part Number:
SN74ALVC16260
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

SeekIC Buyer Protection PLUS - newly updated for 2013!

  • Escrow Protection.
  • Guaranteed refunds.
  • Secure payments.
  • Learn more >>

Month Sales

268 Transactions

Rating

evaluate  (4.8 stars)

Upload time: 2025/12/24

Payment Methods

All payment methods are secure and covered by SeekIC Buyer Protection PLUS.

Notice: When you place an order, your payment is made to SeekIC and not to your seller. SeekIC only pays the seller after confirming you have received your order. We will also never share your payment details with your seller.
Product Details

Description



Features:

 EPICTM (Enhanced-Performance Implanted CMOS) Submicron Process
 Member of the Texas Instruments WidebusTM Family
 ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
 Latch-Up Performance Exceeds 250 mA Per JEDEC Standard JESD-17
 Flow-Through Architecture Optimizes PCB Layout
 Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
 Package Options Include Plastic Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages



Application




Pinout

  Connection Diagram


Specifications

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 4.6 V
Input voltage range, VI: (except I/O ports) (see Note 1) . . . . . . . . . . . .. . . .  . . . . ..0.5 V  to 4.6 V
                                      (I/O ports) (see Notes 1 and 2). . . . . . . . . . . . . . . .   0.5 V to VCC + 0.5 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to VCC + 0.5 V
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . .±50 mA
Continuous current through VCC or GND  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ... ±100mA
Maximum power package dissipation at TA = 55°C (in still air)(see Note 2):DGG package  . .  . . 1 W
                                                                                                                     DL package . .. . . . 1.4 W

Storage temperature range ,Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . .65°C to 150°C 
  


Description

The SN74ALVC16260 is a 12-bit to 24-bit multiplexed D-type latch used in applications where two separate data paths must be multiplexed onto, or demultiplexed from, a single data path. Typical applications include multiplexing and/or demultiplexing address and data information in microprocessor or businterface applications. SN74ALVC16260 is also useful in memory-interleaving applications.

Three 12-bit I/O ports (A1A12, 1B11B12, and 2B12B12) are available for address and/or data transfer. The output-enable (OE1B, OE2B, and OEA) inputs control the bus transceiver functions. The OE1B and OE2B control signals also allow bank control in the A-to-B direction.Address and/or data information can be stored using the internal storage latches. The latch-enable (LE1B, LE2B, LEA1B, and LEA2B) inputs are used to control data storage. When the latch-enable input is high, the latch is transparent. When the latch-enable input goes low, the data present at the inputs is latched and remains latched until the latch-enable input is returned high.Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.The SN74ALVC16260 is available in TI's shrink small-outline (DL) and thin shrink small-outline (DGG) packages, which provide twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.

The SN74ALVC16260 is characterized for operation from 40°C to 85°C.




Customers Who Bought This Item Also Bought

Margin,quality,low-cost products with low minimum orders. Secure your online payments with SeekIC Buyer Protection.
Optoelectronics
Boxes, Enclosures, Racks
Line Protection, Backups
Circuit Protection
Crystals and Oscillators
View more