PinoutSpecificationsSupply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . .0.5 V to 4.6 VInput voltage range, VI(see Note 1) .. . .. . . . . .. . . . . . .. . . . . . . . . . . . . . . .0.5 V to 4.6 VOutput-voltage range, VO (see Notes 1 and 2) . . ...
SN74ALVCH16825: PinoutSpecificationsSupply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . .0.5 V to 4.6 VInput voltage range, VI(see Note 1) .. . .. . . . . .. . . ....
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This SN74ALVCH16825 18-bit buffer and line driver is designed for 1.65-V to 3.6-V VCC operation.
This SN74ALVCH16825 improves the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
The SN74ALVCH16825 device can be used as two 9-bit buffers or one 18-bit buffer. It provides true data.
The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1 or OE2) input is high, all nine affected outputs are in the high-impedance state. To ensure the high-impedance state of SN74ALVCH16825 during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating inputs at a valid logic level.The SN74ALVCH16825 is characterized for operation from 40°C to 85°C.