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SN74ALVCH16863

Features: Member of the Texas Instruments WidebusFamily EPIC(Enhanced-Performance ImplantedCMOS) Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 250 mA Per JESD 17 Bus Hold on Data Inp...

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SeekIC No. : 004498308 Detail

SN74ALVCH16863: Features: Member of the Texas Instruments WidebusFamily EPIC(Enhanced-Performance ImplantedCMOS) Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Ma...

SN74ALVCH16863 Data Sheet

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Part Number:
SN74ALVCH16863
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

Member of the Texas Instruments
  Widebus Family
EPIC (Enhanced-Performance Implanted
  CMOS) Submicron Process
ESD Protection Exceeds 2000 V Per
  MIL-STD-883, Method 3015; Exceeds 200 V
  Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 250 mA Per
  JESD 17
Bus Hold on Data Inputs Eliminates the
   Need for External Pullup/Pulldown
   Resistors
Package Options Include Plastic 300-mil
   Shrink Small-Outline (DL) and Thin Shrink
   Small-Outline (DGG) Packages


Pinout

Connection Diagram


Specifications

Supply voltage range, VCC  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 4.6 V
Input voltage range, V:Except I/O ports (see Note 1)  . . . . . . . . . . . .  . . 0.5 V to 4.6 V
                                  I/O ports (see Notes 1 and 2)  . . . . . . . . . . .  . 0.5 V to V cc+ 0.5 V
Output voltage range, V(see Notes 1 and 2)  . . . . . . . . . . . . . . .  . . . . .0.5 V to V+ 0.5 V
 Input clamp current, IIK. . . . . . . . . . . . . . . . . . . . . . . . . .. . .. . . .  . . . . . (VI < 0) 50 mA
Output clamp current, . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. .. . . . . I.OK (VO< 0) 50 mA
Continuous output current,  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IO±50 mA
Continuous current through each VCC or GND . . . . . . . . .. . . . . . . . . . . . .  . . . . .±100 mA

Package thermal impedance, JA (see Note 3):DGG package. . . . . .. . . . . . .. . ...81°C/W°
                                                                            DL package. . . . . . . . . . . . . . .. .74°C/W
Storage temperature range,  . . . . . . . . . . . . . . . . . . . . . . . . .. . .. . .TSTG 65°C to 150°C
 


Description

This 18-bit bus transceiver is designed for 1.65-V to 3.6-V VCC operation. The SN74ALVCH16863 is an 18-bit noninverting transceiver designed for synchronous communication between data buses. The control-function implementation minimizes external timing requirements.

The SN74ALVCH16863 can be used as two 9-bit transceivers or one 18-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the output-enable (OEAB   or OEBA ) inputs.

To ensure the high-impedance state during power up or power down, OE  should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. The SN74ALVCH16863 is characterized for operation from 40°C to 85°C.




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