SN74AUC2G34

Features:

` Available in the Texas Instruments  NanoStar™ and NanoFree™ Packages
` ±8-mA Output Drive at 1.8 V 
` Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
` Optimized for 1.8-V Operation and Is 3.6-V I/O  Tolerant to Support Mixed-Mode Signal Operation
` Ioff Supports Partial-Power-Down Mode
` ESD Protection Exceeds JESD 22 Operation 
1000-V Charged-Device Model (C101)
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)  Operation
` Sub-1-V Operable
` Max tpd of 1.6 ns at 1.8 V
` Low Power Consumption, 10 mA at 1.8 V

Pinout




Specifications

			MIN	MAX	UNIT
VCC	Supply voltage range		0.5	3.6	V
VI	Input voltage range(2)		0.5	4.1	V
VO	Voltage range applied to any output in the high-impedance or power-off state(2)		0.5	4.1	V
VO	Output voltage range applied in the high or low state(2)		0.5	VCC + 0.5	V
IIK	Input clamp current	VI < 0		50	mA
IOK	Output clamp current	VO < 0		- 50	mA
IO	Continuous output current			±20	mA
Continuous current throughVCC or GND				±100	mA
JA	Package thermal impedance (3)	DGG package		165	°C/W
		DGV package		259
		GQL package		142
		YEP/YZP package		123
Tstg	Storage temperature range		65	150	°C

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.

Description

This SN74AUC2G34 dual buffer gate is operational at 0.8-V to 2.7-V V_CC, but is designed specifically for 1.65-V to 1.95-V V_CC operation.

The SN74AUC2G34 performs the Boolean function Y = A in positive logic.

SN74AUC2G34 NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This SN74AUC2G34 device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.