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SN74AUC2G79

Features: ` Available in the Texas Instruments NanoStar™ and NanoFree™ Packages` Optimized for 1.8-V Operation and Is 3.6-V I/OTolerant to Support Mixed-Mode Signal Operation` Ioff Supports Partial-Power-Down Mode Operation` Sub-1-V Operable` Max tpd of 1.9 ns at 1.8 V` Low Power Consu...

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SeekIC No. : 004498499 Detail

SN74AUC2G79: Features: ` Available in the Texas Instruments NanoStar™ and NanoFree™ Packages` Optimized for 1.8-V Operation and Is 3.6-V I/OTolerant to Support Mixed-Mode Signal Operation` Ioff Suppo...

SN74AUC2G79 Data Sheet

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Part Number:
SN74AUC2G79
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

` Available in the Texas Instruments NanoStar™ and NanoFree™ Packages
` Optimized for 1.8-V Operation and Is 3.6-V I/OTolerant to Support Mixed-Mode Signal Operation
` Ioff Supports Partial-Power-Down Mode Operation
` Sub-1-V Operable
` Max tpd of 1.9 ns at 1.8 V
` Low Power Consumption, 10-mA Max ICC
` ±8-mA Output Drive at 1.8 V
` Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
` ESD Performance Tested Per JESD 22
2000-V Human-Body Model (A114-B, Class II)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)




Pinout

Connection Diagram


Specifications

  MIN MAX UNIT
VCC Supply voltage range 0.5 3.6 V
VI Input voltage range(2) 0.5 3.6 V
VO Voltage range applied to any output in the high-impedance or power-off state(2) 0.5 3.6 V
VO Output voltage range applied in the high or low state(2) 0.5 VCC + 0.5 V
IIK Input clamp current VI < 0   50 mA
IOK Output clamp current VO < 0   - 50 mA
IO Continuous output current   ±20 mA
Continuous current throughVCC or GND   ±100 mA
JA Package thermal impedance (3) DCT package   220 °C/W
DCU package   227
YEP/YZP package   102
Tstg Storage temperature range 65 150 °C


(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.

 




Description

This SN74AUC2G79 single positive-edge-triggered D-type flip-flop is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.

When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs SN74AUC2G79 at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.

SN74AUC2G79 NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This SN74AUC2G79 device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.




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