SN74AUP1G79YEPR Selling Leads, Price trend, SN74AUP1G79YEPR DataSheet download, circuit diagram from SeekIC.com

Features: ` Available in the Texas Instruments NanoStar and NanoFree Packages` Low Static-Power Consumption; ICC = 0.9 A Max` Low Dynamic-Power Consumption; Cpd = 3 pF Typ at 3.3 V` Low Input Capacitance; Ci = 1.5 pF Typ` Low Noise − Overshoot and Undershoot <10% of V...

See larger image

SeekIC No. : 004498519 Detail

SN74AUP1G79YEPR: Features: ` Available in the Texas Instruments NanoStar and NanoFree Packages` Low Static-Power Consumption; ICC = 0.9 A Max` Low Dynamic-Power Consumption; Cpd = 3 pF Typ at 3.3 ...

SN74AUP1G79YEPR Data Sheet

Get Latest Price

Part Number:: SN74AUP1G79YEPR
Supply Ability:: 5000

Price Break

Qty
1~5000

Unit Price
Negotiable

Processing time
15 Days

SeekIC Buyer Protection PLUS - newly updated for 2013!

Escrow Protection.
Guaranteed refunds.
Secure payments.
Learn more >>

Month Sales

268 Transactions

Rating

evaluate (4.8 stars)

Upload time: 2025/12/24

add to my favourite

Payment Methods

All payment methods are secure and covered by SeekIC Buyer Protection PLUS.

Notice: When you place an order, your payment is made to SeekIC and not to your seller. SeekIC only pays the seller after confirming you have received your order. We will also never share your payment details with your seller.

Product Details

Description

Features:

` Available in the Texas Instruments
NanoStar and NanoFree Packages
` Low Static-Power Consumption;
ICC = 0.9 A Max
` Low Dynamic-Power Consumption;
Cpd = 3 pF Typ at 3.3 V
` Low Input Capacitance; Ci = 1.5 pF Typ
` Low Noise − Overshoot and Undershoot
<10% of VCC
` Ioff Supports Partial-Power-Down Mode Operation
` Input Hysteresis Allows Slow Input
Transition and Better Switching Noise
Immunity at the Input
(Vhys = 250 mV Typ at 3.3 V)
` Wide Operating VCC Range of 0.8 V to 3.6 V
` Optimized for 3.3-V Operation
` 3.6-V I/O Tolerant to Support Mixed-Mode
Signal Operation
` tpd = 3.6 ns Max at 3.3 V
` Suitable for Point-to-Point Applications
` Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
` ESD Performance Tested Per JESD 22
− 2000-V Human-Body Model
(A114-B, Class II)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
` ESD Protection Exceeds ±5000 V With
Human-Body Model

Pinout

Connection Diagram

Specifications

Supply voltage range, V_CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .−0.5 V to 4.6 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
Voltage range applied to any output in the high-impedance or power-off state, VO
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .−0.5 V to 4.6 V
Output voltage range in the high or low state, VO (see Note 1) . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Input clamp current, I_IK(VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .−50 mA
Output clamp current, I_OK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±20 mA
Continuous current through V_CC or G_ND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, _JA (see Note 2): D_BV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206°C/W
DCK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .252°C/W
YEP/YZP package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .132°C/W
Storage temperature range, T_stg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .−65°C to 150°C
† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.

Description

The AUP family is TI's premier solution to the industry's low power needs in battery-powered portable applications. This SN74AUP1G79YEPR family ensures a very low static and dynamic power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see Figures 1 and 2).

This is a single positive-edge-triggered D-type flip-flop. When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. SN74AUP1G79YEPR Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.

SN74AUP1G79YEPR

product image

floor Price/Ceiling Price

Price Break

Month Sales

Rating

Payment Methods

Recent History

Description

Customers Who Bought This Item Also Bought

Motors, Solenoids, Driver Boards/Modules(2035)

Industrial Controls, Meters(3690)

Sensors, Transducers(2877)

Optical Inspection Equipment(251)

Capacitors(4587)

Semiconductor Modules(17785)