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SN74AVC16334

Features: Member of the Texas Instruments Widebus™ FamilyEPIC™ (Enhanced-Performance Implanted CMOS) Submicron ProcessDOC™ (Dynamic Output Control) Circuit Dynamically Changes Output Impedance, Resulting in Noise Reduction Without Speed DegradationDynamic Drive Capability Is Equi...

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SN74AVC16334: Features: Member of the Texas Instruments Widebus™ FamilyEPIC™ (Enhanced-Performance Implanted CMOS) Submicron ProcessDOC™ (Dynamic Output Control) Circuit Dynamically Changes Outp...

SN74AVC16334 Data Sheet

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Part Number:
SN74AVC16334
Supply Ability:
5000

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  • 1~5000
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  • 15 Days
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Product Details

Description



Features:

Member of the Texas Instruments Widebus™ Family
EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process
DOC™ (Dynamic Output Control) Circuit Dynamically Changes Output Impedance, Resulting in Noise Reduction Without Speed Degradation
Dynamic Drive Capability Is Equivalent to Standard Outputs With IOH  and IOL of 24 mA at 2.5-V VCC
Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications
Ioff  Supports Partial-Power-Down Mode Operation
Ideal for Use in PC133 Registered DIMM Applications
ESD Protection Exceeds JESD 22
    2000-V Human-Body Model (A114-A)
    200-V Machine Model (A115-A)
 Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
Package Options Include Plastic Thin Shrink Small-Outline (DGG) and Thin Very Small-Outline (DGV) Packages


Specifications

Supply voltage range, VCC. . .. . . . . . . . . .. . . . . . . . . .. . . . .  .  . -0.5 V to 4.6 V
Input voltage range, VI(see Note 1) . . . . . . . . . . . . . . . .. . . . . . -0.5 V to 4.6 V
Voltage range applied to any output in the high-impedance or power-off state, 
      . . . . . . .  VO(see Note 1)  . -0.5 V to 4.6 V
Voltage range applied to any output in the high or low state, VO (see Notes 1
      and 2) . . . . . . . . -0.5 V to VCC  + 0.5 V
Input clamp current, IIK(VI < 0) . . .. . . . . . .. . . . . . . . . .. . . . . . . . . .. . .-50 mA
Output clamp current, IOK(VO < 0) . . .. . . . . . . .. .. . . . . . . . . .. . . . . . . .-50 mA
Continuous output current, IO. . . . . . . . . . . . . . .. . . . . . . . . . . .. . . . . .±50 mA
Continuous current through each VCCor GND  . . . . . . . . . . . . . .  . . . .±100 mA
Package thermal impedance, JA(see Note 3):DGG package .. . . . .. . .. 70/W
                                                                        DGV package . . .   .  . . . 58/W
Storage temperature range, Tstg . . . . . . . . . . . .  . . . . . . . . . . . .-65 to 150 


Description

       A SN74AUCH16374 Dynamic Output Control (DOC) circuit is implemented, which, during the transition, initially lowers the output impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows typical VOL  vs IOL  and VOH vs IOH curves to illustrate the output impedance and drive capability of the circuit. At the beginning of the signal transition, the SN74AUCH16374 DOC circuit provides a maximum dynamic drive that is equivalent to a high-drive standard-output device. For more information, refer to the TI application reports, AVC Logic Family Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOC™) Circuitry Technology and Applications, literature number SCEA009.




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