Position: Home  > All Categories> Integrated Circuits (ICs) > SN74AVC16820

SN74AVC16820

PinoutSpecificationsSupply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 4.6 VInput voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 4.6 VVoltage range a...

product image

SN74AVC16820 Picture
See larger image
SeekIC No. : 004498539 Detail

SN74AVC16820: PinoutSpecificationsSupply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 4.6 VInput voltage range, VI (see Note 1) . . . . ...

SN74AVC16820 Data Sheet

floor Price/Ceiling Price

Get Latest Price
Part Number:
SN74AVC16820
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

SeekIC Buyer Protection PLUS - newly updated for 2013!

  • Escrow Protection.
  • Guaranteed refunds.
  • Secure payments.
  • Learn more >>

Month Sales

268 Transactions

Rating

evaluate  (4.8 stars)

Upload time: 2025/12/24

add to my favourite

Payment Methods

All payment methods are secure and covered by SeekIC Buyer Protection PLUS.

Notice: When you place an order, your payment is made to SeekIC and not to your seller. SeekIC only pays the seller after confirming you have received your order. We will also never share your payment details with your seller.
Product Details

Description



Pinout

Connection Diagram


Specifications

Supply voltage range, VCC  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . .0.5 V to 4.6 V
Input voltage range, VI (see Note 1)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 4.6 V
Voltage range applied to any output in the high-impedance or power-off state, VO
    (see Note 1)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 4.6 V
Voltage range applied to any output in the high or low state, VO
    (see Notes 1 and 2)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  .0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . . . . . . . . . .50 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . . . . . . . . . .50 mA
Continuous output current, IO  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . . .. . . . . . . .±50 mA
Continuous current through each VCC or GND  . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . .. . . . . . . .±100 mA
Package thermal impedance, JA (see Note 3): DGG package  . . . . . . . . . . . . . . . . . .  . . . . . .. . . .64°C/W
                                                                           DGV package  . . . . . . . . . . . . . . . . . . . . .. . . . . . .48°C/W
Storage temperature range, Tstg  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . .65°C to 150°C


Description

A SN74AVC16820 Dynamic Output Control (DOC) circuit is implemented, which, during the transition, initially lowers the output impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows typical VOL vs IOL and VOH vs IOH curves to illustrate the output impedance and drive capability of the circuit. At the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a high-drive standard-output device. For more information, refer to the TI application reports, AVC Logic Family Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOCE) Circuitry Technology and Applications, literature number SCEA009.

This SN74AVC16820 10-bit flip-flop is operational at 1.2-V to 3.6-V VCC, but is designed specifically for 1.65-V to 3.6-V VCC operation.

The SN74AVC16820 flip-flops of the SN74AVC16820 are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs.

A SN74AVC16820 buffered output-enable (OE) input can be used to place the ten outputs in either a normal logic state (high or low logic level) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.

SN74AVC16820 OE input does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

To ensure the SN74AVC16820 high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This SN74AVC16820 device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The SN74AVC16820 is characterized for operation from 40°C to 85°C.




Customers Who Bought This Item Also Bought

Margin,quality,low-cost products with low minimum orders. Secure your online payments with SeekIC Buyer Protection.
You may also be interested in :
Programmers, Development Systems
ARDUINO IIC/I2C 液晶模块
JTAG-SMT2
Hardware, Fasteners, Accessories
MF-A02
LMS700KF07
Static Control, ESD, Clean Room Products
DPA5
PA800-A41
Fans, Thermal Management
3610ML-05W-B49
1608KL-05W-B39
Cables, Wires
821-0814-a
415-0100-150
Cables, Wires - Management
NM-SF50+
CCK26.5-MM-190-30
View more