SN74FB2041A

    The SN74FB2041A device is a 7-bit transceiver designed to translate signals between TTL and backplane transceiver logic (BTL) environments. It is specifically designed to be compatible with IEEE Std 1194.1-1991.

    The B port operates at BTL signal levels of the SN74FB2041A. The open-collector B ports are specified to sink 100 mA. Two output enables (OEB and OEB) are provided for the B outputs. When OEB is high and OEB is low, the B port is active and reflects the inverse of the data present at the A-input pins. When OEB is low, OEB is high, or V_CC  is less than 2.1 V, the B port is turned off. The enable/disable logic partitions the device as two 3-bit sections and one 1-bit section.

    The A port operates of the SN74FB2041A at TTL signal levels and has split input and output pins. The A outputs reflect the inverse of the data at the B port when the A-port output enable (OEA) is high. When OEA is low or when V_CC  is less than 2.1 V, the A outputs are in the high-impedance state.

    Pins are allocated for the four-wire IEEE Std 1149.1 (JTAG) test bus. TMS and TCK are not connected and TDI is shorted to TDO.

    BIAS V_CC establishes a voltage of the SN74FB2041A between 1.62 V and 2.1 V on the BTL outputs when V_CC  is not connected. The SN74FB2041A is characterized for operation from 0 to 70.