Flip Flops Dual Neg Edge Trig
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| Number of Circuits : | 2 | Logic Family : | 74LV | ||
| Logic Type : | J-K Flip-Flop | Polarity : | Inverting/Non-Inverting | ||
| Input Type : | Single-Ended | Output Type : | Differential | ||
| Propagation Delay Time : | 7.1 ns | High Level Output Current : | - 24 mA | ||
| Low Level Output Current : | 24 mA | Supply Voltage - Max : | 3.6 V | ||
| Maximum Operating Temperature : | + 85 C | Mounting Style : | SMD/SMT | ||
| Package / Case : | SOIC-16 | Packaging : | Tube |
The SN74LVC112AD is designed as a dual negative-edge-triggered J-K flip-flop for 1.65V to 3.6V Vcc operation.
SN74LVC112AD has seven features. (1)Operates from 1.65V to 3.6V. (2)Inputs accept voltages to 5.5V. (3)Max tpd of 4.8ns at 3.3V. (4)Typical Volp (output ground bounce)<0.8V at Vcc=3.3V. (5)Typical Vohv(output Voh undershoot)>2V at Vcc=3.3V. (6)Latch-up performance exceeds 250mA per JESD 17. (7)ESD protection exceeds JESD 22 2000V human body model, 200V machine model, 1000V charged-device model. Those are all the main features.
Some absolute maximum ratings of SN74LVC112AD have been concluded into several points as follow. (1)Its supply voltage range would be from -0.5V to 6.5V. (2)Its input voltage range would be from -0.5V to 6.5V. (3)Its output voltage range would be from -0.5V to Vcc+0.5V. (4)Its input clamp current would be max -50mA. (5)Its output clamp current would be max -50mA. (6)Its continuous output current would be max +/-50mA. (7)Its continuous current through Vcc or GND would be max +/-100mA. (8)Its package thermal impedance would be 73°C/W. (9)Its storage temperature range would be from -65°C to 150°C. It should be noted that stresses above those listed in absolute maximum ratings may cause permanent damage to device.
Also some electrical characteristics of SN74LVC112AD are concluded as follow. (1)Its output voltage high level would be min Vcc-0.2V at Vcc=1.65V to 3.6V, Ioh=-100uA and it would be min 1.2V at Vcc=1.65V, Ioh=-4mA and would be min 1.7V at Vcc=2.3V, Ioh=-8mA. (2)Its output voltage low level would be max 0.2V at Vcc=1.65V to 3.6V, Iol=100uA and would be max 0.45V at Vcc=1.65V, Iol=4mA and would be max 0.7V at Vcc=2.3V, Iol=8mA. (3)Its input leakage current would be max +/-5uA. (4)Its input capacitance would be typ 4.5pF. (5)Its clock frequency would be max 150MHz at Vcc=2.7V. And so on. If you have any question or suggestion or want to know more information please contact us for details. Thank you!