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SN74LVC1G80

Features: ` Available in the Texas Instruments NanoStar™ and NanoFree™ Packages` Supports 5-V VCC Operation` Inputs Accept Voltages to 5.5 V` Max tpd of 4.2 ns at 3.3 V` Low Power Consumption, 10-mA Max ICC` ±24-mA Output Drive at 3.3 V` Ioff Supports Partial-Power-Down Mode Operation`...

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SeekIC No. : 004499278 Detail

SN74LVC1G80: Features: ` Available in the Texas Instruments NanoStar™ and NanoFree™ Packages` Supports 5-V VCC Operation` Inputs Accept Voltages to 5.5 V` Max tpd of 4.2 ns at 3.3 V` Low Power Consum...

SN74LVC1G80 Data Sheet

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Part Number:
SN74LVC1G80
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

` Available in the Texas Instruments NanoStar™ and NanoFree™ Packages
` Supports 5-V VCC Operation
` Inputs Accept Voltages to 5.5 V
` Max tpd of 4.2 ns at 3.3 V
` Low Power Consumption, 10-mA Max ICC
` ±24-mA Output Drive at 3.3 V
` Ioff Supports Partial-Power-Down Mode Operation
` Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
` ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)


Pinout

Connection Diagram


Specifications

  MIN MAX UNIT
VCC Supply voltage range 0.5 6.5 V
VI Input voltage range(2) 0.5 6.5 V
VO Voltage range applied to any output in the high-impedance or power-off state(2) 0.5 6.5 V
VO Voltage range applied to any output in the high or low state(2) (3) 0.5 VCC + 0.5 V
IIK Input clamp current VI < 0   50 mA
IOK Output clamp current VO < 0   50 mA
IO Continuous output current   ±50 mA
  Continuous current through VCC or GND   ±100 mA
JA Package thermal impedance(4) DBV package   206 /W
DCK package   252
YEA/YZA package   154
  132
YEP/YZP package
Tstg Storage temperature range 65 150


(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(3) The value of VCC is provided in the recommended operating conditions table.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.




Description

This single positive-edge-triggered D-type flip-flop SN74LVC1G80 is designed for 1.65-V to 5.5-V VCC operation.

When data at the data (D) input meets the setup time requirement, the SN74LVC1G80 data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the level at the output.

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device SN74LVC1G80 is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.




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