Features: · Qualification in Accordance With AEC-Q100 (1)· Qualified for Automotive Applications· Customer-Specific Configuration Control Can Be Supported Along With Major-Change Approval· ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R ...
SN74LVC74A-Q1: Features: · Qualification in Accordance With AEC-Q100 (1)· Qualified for Automotive Applications· Customer-Specific Configuration Control Can Be Supported Along With Major-Change Approval· ESD Prote...
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· Qualification in Accordance With AEC-Q100 (1)
· Qualified for Automotive Applications
· Customer-Specific Configuration Control Can Be Supported Along With Major-Change Approval
· ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
· Operates From 2 V to 3.6 V
· Inputs Accept Voltages to 5.5 V
· Max tpd of 5.2 ns at 3.3 V
· Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
· Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C

|
MIN MAX |
UNIT | ||
| VCC Supply voltage range |
0.5 6.5 |
V | |
| VI Input voltage range(2) |
0.5 6.5 |
V | |
| VO Output voltage range(2) (3) |
0.5 VCC + 0.5 |
V | |
| IIK Input clamp current | VI < 0 |
-50 |
mA |
| IOK Output clamp current | VO < 0 |
-50 |
mA |
| IO Continuous output current |
±50 |
mA | |
| Continuous current through VCC or GND |
±100 |
mA | |
JA Package thermal impedance(4) |
D package |
86 |
°C/W |
| PW package |
113 | ||
| Tstg Storage temperature range |
65 150 |
°C | |
The SN74LVC74A-Q1 dual positive-edge-triggered D-type flip-flop is designed for 2.7-V to 3.6-V VCC operation.
A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When SN74LVC74A-Q1 PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.
SN74LVC74A-Q1 Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.