SN74LVCH16374A

Pinout




Specifications

Supply voltage range, V_CC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5 V to 6.5 V
Input voltage range, V_I (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 6.5 V
Voltage range applied to any output in the high-impedance
  or power-off state, V_O(see Note 1)  . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 6.5 V
Voltage range applied to any output in the high or low state, V_O
                           (see Notes 1 and 2) . . .. . . . . . . . . . . . . . . . 0.5 V to V_CC + 0.5 V 
Input clamp current, I_IK (V_I< 0)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-50 mA
Output clamp current, I_OK(V_O < 0)   . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . .-50 mA
Continuous output current, I_O. . . . . . . . .. . . . .. . . . . . . . . . . . . . . . . .. . . . . .±50 mA
Continuous current through V_CC or GND  . . . . . . . . . . . . . . . . . . . . . . . . . . .±100 mA
Package thermal impedance, JA(see Note 3):  DGG package. .. . . . . . . . . . . . 89/W
                                                                           DL package. .. . . . . .. . . . . . .  94/W
Storage temperature range, T_stg  . . . . . . . . . . . . . . . . . . . . . . .  . . . . . .-65 to 150


Description

This 16-bit edge-triggered D-type flip-flop SN74LVCH16374A is designed for 1.65-V to 3.6-V V_CC operation.

The SN74LVCH16374A is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. It can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CLK) input, the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs.