SN74SSTUB32864

The SN74SSTUB32864 operates from a differential clock (CLK and CLK ). Data are registered at the crossing of CLK going high and CLK going low.The C0 input controls the pinout configuration of the 1:2 pinout from register-A configuration (when low) to register-B configuration (when high). The C1 input controls the pinout configuration from 25-bit 1:1(when low) to 14-bit 1:2 (when high). C0 and C1 should not be switched during normal operation. They should be hard-wired to a valid low or high level to configure the register in the desired mode. In the 25-bit 1:1 pinout configuration, the A6, D6, and H6 terminals are driven low and are do-not-use (DNU) pins.

Features of the SN74SSTUB32864 are:(1)Member of the Texas Instruments Widebus+  Family; (2)Pinout Optimizes DDR2 DIMM PCB Layout; (3)Configurable as 25-Bit 1:1 or 14-Bit 1:2 Registered Buffer; (4)Chip-Select Inputs Gate the Data Outputs from Changing State and Minimizes System Power Consumption; (5)Output Edge-Control Circuitry Minimizes Switching Noise in an Unterminated Line; (6)Supports SSTL_18 Data Inputs; (7)Differential Clock (CLK and CLK ) Inputs; (8)Supports LVCMOS Switching Levels on the Control and RESET Inputs; (9)Supports Industrial Temperature Range(-40 ° C to 85 ° C); (10)RESET Input Disables Differential Input Receivers, Resets All Registers, and Forces All Outputs Low.

The absolute maximum ratings of the SN74SSTUB32864 can be summarized as:(1)Supply voltage range 0.5 to 2.5 V; (2)Input voltage range (2) (3)-0.5 to V CC + 0.5 V; (3)Output voltage range (2) (3) 0.5 to V CC + 0.5 V; (4)Input clamp current, (V I < 0 or V I > V CC ) ± 50 mA; (5)Output clamp current, (V O < 0 or V O > V CC ) ± 50 mA; (6)Continuous output current (V O = 0 to V CC ) ± 50 mA; (7)Continuous current through each V CC or GND ± 100 mA.

If you want to know more information such as the SN74SSTUB32864 electrical characteristics ,please download the datasheet in www.seekdatasheet.com .