PinoutSpecificationsSupply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.4 V to 7 VOn-state Q output voltage range, VO. . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . 0.4 V to 125 V Off-state Q output voltage range...
SN751506: PinoutSpecificationsSupply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.4 V to 7 VOn-state Q output voltage range, VO. . . . . . . . . . ...
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The SN751506 and the SN751516 are monolithic integrated circuits designed to drive the scan lines of a dc plasma panel display. The SN751516 pin sequence is reversed from the SN751506 for ease in printed-circuit-board layout.
Each device SN751506 consists of a 32-bit shift register and 32 OR gates. Serial data is entered into the shift register on the high-to-low transition of the clock input. When STROBE is low, all Q outputs are in the off state. Outputs are open-drain JFET transistors with a breakdown voltage in excess of 180 V. The outputs have a 220-mA sink current capability in the on state. Only one Q output should be allowed to be in the on state at a time.
SERIAL OUT from the shift register can be used to cascade shift registers. This output is not affected by the STROBE input. All inputs are CMOS compatible with ESD protection built in.
The SN751506 and SN751516 are characterized for operation from 0°C to 70°C.