PinoutSpecificationsSupply voltage, VCC1 (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 VSupply voltage, VCC2 (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 VInput voltage, VI . . . . . . . . . . . . ...
SN75555: PinoutSpecificationsSupply voltage, VCC1 (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 VSupply voltage, VCC2 (see Note 2) . . . . . . . . . . . . . ...
SeekIC Buyer Protection PLUS - newly updated for 2013!
268 Transactions
All payment methods are secure and covered by SeekIC Buyer Protection PLUS.


The SN65555, SN75555, SN65556, and SN75556 are monolithic BIDFET† integrated circuits designed to drive the column electrodes of an electroluminescent display. The SN65556 and SN75556 output sequence is reversed from the SN65555 and SN7555 5 for ease in printed-circuitboard layout.
The devices SN75555 consist of a 32-bit shift register, 32 latches, and 32 output AND gates. Serial data is entered into the shift register on the low-to-high transition of CLOCK. When high, LATCH ENABLE transfers the shift register contents to the outputs of the 32 latches. When OUTPUT ENABLE is high, all Q outputs are enabled. Data must be loaded into the latches and OUTPUT ENABLE must be high before supply voltage VCC2 is ramped up.
Serial data output from the shift register can be used to cascade shift registers. This output is not affected by LATCH ENABLE or OUTPUT ENABLE.The SN65555 and SN65556 are characterized for operation from 40 to 85 . The SN75555 and SN75556 are characterized for operation from 0 to 70 .