SNJ54HC175

Features:

Wide Operating Voltage Range of 2 V to 6 V
Outputs Can Drive Up To 10 LSTTL Loads
Low Power Consumption, 80-A Max ICC
Contain Four Flip-Flops With Double-Rail Outputs
Typical tpd = 13 ns
±4-mA Output Drive at 5 V
Low Input Current of 1 A Max
Applications Include:
  − Buffer/Storage Registers
  − Shift Registers
  − Pattern Generators


Pinout




Specifications

Supply voltage range, V_CC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . −0.5 V to 7 V
Input clamp current, I_IK (V_I < 0 or V_I > V_CC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, I_OK (V_O < 0 or V_O > V_CC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, I_O (V_O = 0 to V_CC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through V_CC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, _JA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
                                                                          DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
                                                                          N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W
                                                                          NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
                                                                          PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W
Storage temperature range, T_stg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C

† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.


Description

These positive-edge-triggered D-type flip-flops have a direct clear (CLR) input. The SNJ54HC175 devices feature complementary outputs from each flip-flop.

Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not related directly to the transition time of the positive-going edge of CLK. When CLK is at either the high or low level, the D input has no effect at the output.