SP8402KGMPES

The SP8402KGMPES is designed as very low phase noise divider by 2^n. It is a very low phase noise divider which divides by powers of two. The S0, S1, S2 data inputs select the division ratio in the range 2^1 to 2^8. Special circuits techniques have been used to reduce the phase noise considerably below that produced by standard dividers. It is packaged in a 28 pin plastic SO package to be compatible with the SP8400 and SP8401 devices.

SP8402KGMPES has two features. (1)Very low phase noise (typically -155 to 160 dBc / Hz at 1kHz offset). (2)Supply voltage 5V. That are all the main features.

Some absolute maximum ratings of SP8402KGMPES have been concluded into several points as follow. (1)Its supply voltage would be 6.5V. (2)Its output current would be 20mA. (3)Its storage temperature range would be from -55°C to +125°C. (4)Its maximum clock input voltage would be 2.5Vp-p. That are all the main ratings. It should be noted that stresses above those listed in absolute maximum ratings may cause permanent damage to device.

Also some electrical characteristics of SP8402KGMPES(guaranteed over: supply voltage VCC = +4.75V to +5.25V temperature Tamb = -10°C to +75°C and tested at +4.75V and +5.25V at Tamb = +25°C) are concluded as follow. (1)Its supply current would be min 82mA and typ 92mA and max 102mA. (2)Its output voltage swing would be min 320mV and typ 410mV. (3)Its input sensitivity 200MHz to 1.5GHz would be max 140mV. (4)Its logic high voltage would be min 2.2V. (5)Its low low voltage would be max 0.8V. (6)Its input current would be max 180uA with conditions of 5V data input voltage. And so on. If you have any question or suggestion or want to know more information please contact us for details. Thank you!