SPT7750

• 1:2 Demuxed ECL compatible outputs
• Wide input bandwidth900 MHz
• Low input capacitance15 pF
• Metastable errors reduced to 1 LSB
• Monolithic for low cost
• Gray code output

• Digital oscilloscopes
• Transient capture
• Radar, EW, ECM
• Direct RF down-conversion

The SPT7750 is a full parallel (flash) analog-to-digital con-verter capable of digitizing full scale (0 to 2 V) inputs intoeight-bit digital words at an update rate of 500 MSPS. TheECL-compatible outputs are demultiplexed into two sepa-rate output banks,each with differential data ready out-puts to ease the task of data capture.The SPT7750s wideinput bandwidth and low capacitance eliminate the needfor external track-and-hold amplifiers for most applications. A proprietary decoding scheme reduces metastableerrors to the 1 LSB level. The SPT7750 operates from asingle 5.2 V supply, with a nominal power dissipation of5.5 W.

The SPT7750 is available in an 80-lead surface-mountMQuad package over the industrial temperature range(25 °C to +85 °C) and in die form.

The SPT7750 has 256 preamp/comparator pairs whichare each supplied with the voltage from VRT to VRB dividedequally by the resistive ladder as shown in the block dia-gram. This voltage is applied to the positive input of eachpreamplifier/comparator pair. An analog input voltage applied at VIN is connected to the negative inputs of eacpreamplifier/comparator pair. The comparators are thenclocked through each one's individual clock buffer. Whenthe CLK pin is in the low state, the master or input stage ofthe comparators compare the analog input voltage to therespective reference voltage. When the CLK pin changesfrom low to high the comparators are latched to the state