Features: ` User Program Memory (OTP/EPROM):8 to 16K bytes` Data RAM: 384 to 512 bytes including 256 bytes of stack` Master Reset and Power-On Reset` Low Voltage Detector (LVD) Reset option` Run and Power Saving modes` 32 multifunctional bidirectional I/O lines: 9 programmable interrupt inputs 4 ...
ST72T121: Features: ` User Program Memory (OTP/EPROM):8 to 16K bytes` Data RAM: 384 to 512 bytes including 256 bytes of stack` Master Reset and Power-On Reset` Low Voltage Detector (LVD) Reset option` Run and...
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| Symbol | Parameter | Value | Unit |
| VDD | Supply Voltage | -0.3 to 6.0 | V |
| VDDA | Analog Supply and Reference Voltage | VDD - 0.3 to VDD + 0.3 | V |
| VI | Input Voltage | VSS - 0.3 to VDD + 0.3 | V |
| VAI | Analog Input Voltage (A/D Converter) | VSS - 0.3 to VDD + 0.3 VSSA-0.3 to VDDA+0.3 |
V |
| IO | Current Drain per Pin Excluding VDD, VSS | VSS - 0.3 to VDD + 0.3 | V |
| IVDD | Total Current into VDD (source) | 100 | mA |
| IVSS | Total Current out of VSS (sink) | 100 | mA |
| Tj | Junction Temperature | 150 | |
| TSTG | Storage Temperature | -60 to 150 |
Note: Stresses above those listed as "absolute maximum ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these conditions is not implied. Exposure to maximum
rating conditions for extended periods may affect device reliability.
The ST72T121 HCMOS Microcontroller Unit (MCU) is a member of the ST7 family. The device is based on an industry-standard 8-bit core and features an enhanced instruction set. The device is normally operated at a 16 MHz oscillator fre-quency. Under software control, the ST72T121 may be placed in either Wait, Slow or Halt modes,thus reducing power consumption. The enhanced instruction set and addressing modes afford real programming potential. In addition to standard 8-bit data management, the ST72T121 features true bit manipulation, 8x8 unsigned multiplication and indirect addressing modes on the whole mem- ory. The device includes a low consumption and fast start on-chip oscillator, CPU, program memo- ry (OTP/EPROM versions), RAM, 32 I/O lines, a Low Voltage Detector (LVD) and the following on-chip peripherals: industry standard synchronous SPI and asynchronous SCI serial interfaces, digit- al Watchdog, two independent 16-bit Timers, one featuring an External Clock Input, and both featur- ing Pulse Generator capabilities, 2 Input Captures and 2 Output Compares (only 1 Input Capture and 1 Output Compare on Timer A).