STE10/100

The STE10/100 is designed as one kind of PCI 10/100 ethernet controller with integrated phy (5V). The transceiver portion of this device integrates the IEEE802.3u compliant functions of PCS (physical coding sub-layer), PMA (physical medium attachment) sub-layer, and PMD (physical medium dependent) sub-layer for 100BASE-TX, and the IEEE802.3 compliant functions of Manchester encoding/decoding and transceiver for 10BASE-T. All the functions and operating schemes are described in the following sections.

Features of the STE10/100 are:(1)provides burst transmit packet interrupt and transmit/receive early interrupt to reduce host CPU utilization;(2)supports big or little endian byte ordering;(3)provides 32-bit PCI bus master data transfer;(4)integrates the complete set of Physical layer 100BASE-TX and 10BASE-T functions;(5)built-in stream cipher scrambler/ de-scrambler and 4B/5B encoder/decoder;(6)supports external transmit transformer with 1.414:1 turn ratio;(7)PCI bus interface Rev. 2.2 compliant;(8)ACPI and PCI power management standard compliant;(9)support PC99 wake on LAN;(10)provides independent transmission and receiving FIFOs, each 2k bytes long.

The absolute maximum ratings of the STE10/100 can be summarized as:(1)storage temperature:-65 °C to 150 °C(-85°F to 302°F);(2)supply voltage(Vcc):-0.5 V to 7.0 V;(3)output voltage:-0.5 V to Vcc+0.5 V;(4)input voltage:-0.5 V to Vcc+0.5 V;(5)ambient temperature:0°C to 70°C(32°F to 158°F);(6)ESD protection:2000V. If you want to know more information such as the electrical characteristics about the STE10/100, please download the datasheet in www.seekic.com or www.chinaicmart.com.