STLC60134S

Features: FULLY INTEGRATED AFE FOR ADSLOVERALL 12 BIT RESOLUTION, 1.1MHz SIGNAL BANDWIDTH8.8MS/s ADC8.8MS/s DACTHD: -60dB @FULL SCALE4-BIT DIGITAL INTERFACE TO/FROM THE DMT MODEM1V FULL SCALE INPUTDIFFERENTIAL ANALOG I/O ACCURATE CONTINUOUS-TIME CHANNEL FILTERING3rd & 4th ORDER TUNABLE CONTINU...

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SeekIC No. : 004508097 Detail

STLC60134S: Features: FULLY INTEGRATED AFE FOR ADSLOVERALL 12 BIT RESOLUTION, 1.1MHz SIGNAL BANDWIDTH8.8MS/s ADC8.8MS/s DACTHD: -60dB @FULL SCALE4-BIT DIGITAL INTERFACE TO/FROM THE DMT MODEM1V FULL SCALE INPUTD...

floor Price/Ceiling Price

Part Number:
STLC60134S
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/24

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Product Details

Description



Features:

FULLY INTEGRATED AFE FOR ADSL
OVERALL 12 BIT RESOLUTION, 1.1MHz SIGNAL BANDWIDTH
8.8MS/s ADC
8.8MS/s DAC
THD: -60dB @FULL SCALE
4-BIT DIGITAL INTERFACE TO/FROM THE DMT MODEM
1V FULL SCALE INPUT
DIFFERENTIAL ANALOG I/O
ACCURATE CONTINUOUS-TIME CHANNEL FILTERING
3rd & 4th ORDER TUNABLE CONTINUOUS TIME LP FILTERS
0.5 WATT AT 3.3V
0.5mm HCMOS5 LA TECHNOLOGY
64 PIN TQFP PACKAGE



Pinout

  Connection Diagram


Specifications

Symbol Parameter Min Max Unit
VDD Any VDD Supply Voltage, related to substrate - 0.5 5 V
Vin Voltage at any input pin -0.5 VDD +0.5 V
Tstg Storage Temperature -40 125
TL Lead Temperature (10 second soldering)   300
ILU Latch - up current @80 100   mA
IAVDD Analog Supply Current @ 3.6V - normal operation   30 mA
IAVDD Analog Supply Current @ 3.6V - power down   56 mA
IDVDD Analog Supply Current @ 3.6V - normal operation   56 mA
IDVDD Analog Supply Current @ 3.6V - power down   50  



Description

STLC60134S is the Analog Front End of the STMicroelectronics Tosca] ADSL chipset and when coupled with TLC60135 (DTM modem) allows to get a T1.413 Issue 2 compliant solution.

The STLC60134S analog front end handles 2 transmission channels on a balanced 2 wire interconnection;a 16 to 640Kbit/s upstream channel and a 1.536 to 8.192Mbit/s downstream channel.

A 256 carrier DMT coding (frequency spacing 4.3125kHz) transforms the downstream channel to a 1MHz bandwidth analog signal (tones 32-255) and the upstream channel (tones 8-31) to a 100kHz bandwidth signal on the line.

This asymmetrical data transmission system uses high resolution, high speed analog to digital and digital to analog conversion and high order analog filtering to reduce the echo and noise in both the ATU-C/ATU-R receivers and transmitters. External low noise driver and input stage used with STLC60134Sguarantee low noise performances.

The STLC60134S chip can be used at ATU-C and ATU-R ends (behaviour set by LTNT pin).The selection consists mainly of a filter interchange between the RX and TX path. The filters (with a programmable cutoff frequency) use automatic Continuous Time Tuning to avoid time varying phase characteristic which can be of dramatic consequencefor DMT modem. It requires few external components, uses a 3.3V supply (a separate 3.0V supply of the digital part is possible)and is packaged in a 64-pin TQFP in order to reduce PCB area.




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