SY100E141

The SY10/SY100E141 are 8-bit, full-function shift registers designed for use in new, high-performance ECL systems. The SY100E141 performs serial/parallel in and serial/parallel out, shifting in either direction. The eight inputs D0D7 accept parallel input data, while DL/DR accept serial input data for left/right shifting.

The two select pins, SY100E141, SEL0 and SEL1 permit four modes of operation: Load, Hold, Shift Left and Shift Right, as shown in the Truth Table. Input data is clocked into the register on the rising clock edge after meeting the minimum set-up time. A logic HIGH on the Master Reset (MR) pin asynchronously resets all the registers to zero.