SY100ELT21L

Features: 3.3V power supply 2.0ns typical propagation delay Low power Differential LVPECL inputs 24mA TTL outputs Flow-through pinouts Available in 8-pin SOIC packagePinoutSpecifications Symbol Parameter Value Unit VCC Power Supply Voltage 0.5 to +7.0 V VI PECL Input Voltage 0V...

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SY100ELT21L Picture
SeekIC No. : 004509940 Detail

SY100ELT21L: Features: 3.3V power supply 2.0ns typical propagation delay Low power Differential LVPECL inputs 24mA TTL outputs Flow-through pinouts Available in 8-pin SOIC packagePinoutSpecifications Symbo...

floor Price/Ceiling Price

Part Number:
SY100ELT21L
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/23

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Product Details

Description



Features:

  3.3V power supply
  2.0ns typical propagation delay
  Low power
  Differential LVPECL inputs
  24mA TTL outputs
  Flow-through pinouts
  Available in 8-pin SOIC package



Pinout

  Connection Diagram


Specifications

Symbol Parameter Value Unit
VCC Power Supply Voltage 0.5 to +7.0 V
VI PECL Input Voltage 0V to VCC+0.5 V
VO Voltage Applied to Output at HIGH State 0.5 to +5.5 V
IO Current Applied to
Output at LOW State
Twice the
Rated IOL
mA
Tstore Storage Temperature 65 to +150 °C
TA Operating Temperature 40 to +85 °C



Description

The SY10/SY100ELT21L are single differential LVPECLto- LVTTL translators using a single +3.3V power supply. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3V and ground are required. The small outline 8-lead SOIC package and low skew single gate design make the SY100ELT21L ideal for applications that require the translation of a clock or data signal where minimal space, low power, and low cost are critical.

VBB allows a differential, SY100ELT21L, single-ended, or AC-coupled interface to the device. If used, the VBB output should be bypassed to VCC with 0.01F capacitor.

Under open input conditions, the /D will be biased at a VCC/2 voltage level and the D input will be pulled to ground. This condition of SY100ELT21L will force the Q output low to provide added stability.

The SY100ELT21L is available in both ECL standards: the 10ELT is compatible with positive ECL 10H logic levels, while the 100ELT is compatible with positive ECL 100K logic levels.




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