Features: ·9-bit ideal for byte-parity applications·3-state TTL outputs·Flow-through configuration·Extra TTL and ECL power/ground pins to minimize switching noise·Dual supply·6.0ns max. delay into 50pF, 12ns into 200pF (all outputs switching)·PNP TTL inputs for low loading·Choice of ECL compatibil...
SY100H603: Features: ·9-bit ideal for byte-parity applications·3-state TTL outputs·Flow-through configuration·Extra TTL and ECL power/ground pins to minimize switching noise·Dual supply·6.0ns max. delay into 5...
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DescriptionThe SY10/100E111 are low skew 1-to-9 differential drivers designed for clock distributi...

The SY10/SY100H603 are 9-bit, dual supply ECL-to-TTL translators. Devices in the Micrel-Synergy 9-bit translator series utilize the 28-lead PLCC for optimal power pinning, signal flow-through and electrical performance.
The SY100H603 feature a 48mA TTL output stage and AC performance is specified into both a 50pF and 200pF load capacitance. Latching is controlled by Latch Enable LEN) and Master Reset (MR) resets the latches. A HIGH on OEECL sends the outputs into the high impedance state. All control inputs are ECL level.
The SY100H603 version is compatible with MECL 10KH ECL logic levels. The SY100H603 version is compatible with 100K levels.