Features: · 3.3V power supply· PECL-to-TTL version of popular ECLinPS E111· Guaranteed low skew specification· Latched input· Differential ECL internal design· VBB output for single-ended operation· Reset/enable· Extra TTL and ECL power/ground pins· Choice of ECL compatibility: MECL 10KH (10Hxxx) ...
SY100H641L: Features: · 3.3V power supply· PECL-to-TTL version of popular ECLinPS E111· Guaranteed low skew specification· Latched input· Differential ECL internal design· VBB output for single-ended operation·...
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DescriptionThe SY10/100E111 are low skew 1-to-9 differential drivers designed for clock distributi...

|
Symbol |
Rating |
Value |
Unit |
|
VE (ECL) VT (TTL) |
Power Supply Voltage |
0.5 to +7.0 V 0.5 to +7.0 |
V |
|
VI (ECL) |
Input Voltage |
0.0 to VE |
V |
|
VOUT (TTL) |
Disabled 3-State Output |
0.0 to VT |
V |
|
IOUT (ECL) |
Output Current - Continuous - Surge |
50 100 |
mA |
|
Tstore |
Storage Temperature |
65 to +150 |
°C |
|
TA |
Operating Temperature |
0 to +85 |
°C |
The SY10/SY100H641L are single supply, low skew translating 1:9 clock drivers. Devices in the Micrel- Synergy H600 translator series utilize the 28-lead PLCC for optimal power pinning, signal flow-through and electrical performance.
The SY100H641L feature a 24mA TTL output stage with AC performance specified into a 20pF load capacitance. A latch is provided on-chip. When LEN is LOW (or left open, in which case it is pulled LOW by the internal pulldowns), the latch is transparent. A HIGH on the enable pin (/EN) forces all outputs LOW.
The SY100H641L version is compatible with MECL 10KH ECL logic levels. The 100H version is compatible with 100K levels.