Features: `Max. propagation delay of 900ps`IEE min. of 48mA`Extended supply voltage option: VEE = 4.2V to 5.5V`Voltage and temperature compensation for improved noise immunity`Internal 75KΩ input pull-down resistors`Approximately 40% lower power than Fairchild`Function and pinout compatible ...
SY100S317: Features: `Max. propagation delay of 900ps`IEE min. of 48mA`Extended supply voltage option: VEE = 4.2V to 5.5V`Voltage and temperature compensation for improved noise immunity`Internal 75KΩ in...
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DescriptionThe SY10/100E111 are low skew 1-to-9 differential drivers designed for clock distributi...

The SY100S317 is a set of ultra-fast, triple 2-wide OR/ AND gates designed for use in high-performance ECL systems. This device offers both true and complement outputs. The inputs on SY100S317 have 75KΩ pull-down resistors.